ARM: dts: r8a77470: Add SMP support (a21efdbc) · Commits · 戴 / test

Add DT node for the Advanced Power Management Unit (APMU), add the second CPU core, and use "renesas,apmu" as "enable-method". Signed-off-by:

arch/arm/boot/dts/r8a77470.dtsi

+16 −0

Original line number	Diff line number	Diff line
		@@ -17,6 +17,7 @@
		cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		enable-method = "renesas,apmu";

		cpu0: cpu@0 {
		device_type = "cpu";
		@@ -28,6 +29,15 @@
		next-level-cache = <&L2_CA7>;
		};

		cpu1: cpu@1 {
		device_type = "cpu";
		compatible = "arm,cortex-a7";
		reg = <1>;
		clock-frequency = <1000000000>;
		clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>;
		power-domains = <&sysc R8A77470_PD_CA7_CPU1>;
		next-level-cache = <&L2_CA7>;
		};

		L2_CA7: cache-controller-0 {
		compatible = "cache";
		@@ -167,6 +177,12 @@
		#reset-cells = <1>;
		};

		apmu@e6151000 {
		compatible = "renesas,r8a77470-apmu", "renesas,apmu";
		reg = <0 0xe6151000 0 0x188>;
		cpus = <&cpu0 &cpu1>;
		};

		rst: reset-controller@e6160000 {
		compatible = "renesas,r8a77470-rst";
		reg = <0 0xe6160000 0 0x100>;