Commit a1d2afc5 authored by Martin Leung's avatar Martin Leung Committed by Alex Deucher
Browse files

drm/amd/display: adding ddc_gpio_vga_reg_list to ddc reg def'ns



why:
oem-related ddc read/write fails without these regs

how:
copy from hw_factory_dcn20.c

Signed-off-by: default avatarMartin Leung <martin.leung@amd.com>
Acked-by: default avatarAurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 140b2ef1
Loading
Loading
Loading
Loading
+12 −0
Original line number Diff line number Diff line
@@ -117,6 +117,12 @@ static const struct ddc_registers ddc_data_regs_dcn[] = {
	ddc_data_regs_dcn2(4),
	ddc_data_regs_dcn2(5),
	ddc_data_regs_dcn2(6),
	{
			DDC_GPIO_VGA_REG_LIST(DATA),
			.ddc_setup = 0,
			.phy_aux_cntl = 0,
			.dc_gpio_aux_ctrl_5 = 0
	}
};

static const struct ddc_registers ddc_clk_regs_dcn[] = {
@@ -126,6 +132,12 @@ static const struct ddc_registers ddc_clk_regs_dcn[] = {
	ddc_clk_regs_dcn2(4),
	ddc_clk_regs_dcn2(5),
	ddc_clk_regs_dcn2(6),
	{
			DDC_GPIO_VGA_REG_LIST(CLK),
			.ddc_setup = 0,
			.phy_aux_cntl = 0,
			.dc_gpio_aux_ctrl_5 = 0
	}
};

static const struct ddc_sh_mask ddc_shift[] = {