Commit a19331ca authored by Joel Stanley's avatar Joel Stanley
Browse files

ARM: dts: aspeed: Clean up UART nodes 



- Shorten size of reg property so it covers only the implemented
 registers

 - Add VUART compatible, and change node name to serial@

 - Remove outdated current-speed property. Different bootloaders use
 different speeds, so this is no longer helpful

Reviewed-by: default avatarAndrew Jeffery <andrew@aj.id.au>
Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
parent db4d6d9d

arch/arm/boot/dts/aspeed-g4.dtsi

+9 −9
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ 
		serial2 = &uart3;

		serial3 = &uart4;

		serial4 = &uart5;

		serial5 = &vuart;

	};



	cpus {
@@ -185,7 +186,7 @@ 


			uart1: serial@1e783000 {

				compatible = "ns16550a";

				reg = <0x1e783000 0x1000>;

				reg = <0x1e783000 0x20>;

				reg-shift = <2>;

				interrupts = <9>;

				clocks = <&clk_uart>;
@@ -195,11 +196,10 @@ 


			uart5: serial@1e784000 {

				compatible = "ns16550a";

				reg = <0x1e784000 0x1000>;

				reg = <0x1e784000 0x20>;

				reg-shift = <2>;

				interrupts = <10>;

				clocks = <&clk_uart>;

				current-speed = <38400>;

				no-loopback-test;

				status = "disabled";

			};
@@ -218,9 +218,9 @@ 
				status = "disabled";

			};



			uart6: serial@1e787000 {

				compatible = "ns16550a";

				reg = <0x1e787000 0x1000>;

			vuart: serial@1e787000 {

				compatible = "aspeed,ast2400-vuart";

				reg = <0x1e787000 0x40>;

				reg-shift = <2>;

				interrupts = <10>;

				clocks = <&clk_uart>;
@@ -230,7 +230,7 @@ 


			uart2: serial@1e78d000 {

				compatible = "ns16550a";

				reg = <0x1e78d000 0x1000>;

				reg = <0x1e78d000 0x20>;

				reg-shift = <2>;

				interrupts = <32>;

				clocks = <&clk_uart>;
@@ -240,7 +240,7 @@ 


			uart3: serial@1e78e000 {

				compatible = "ns16550a";

				reg = <0x1e78e000 0x1000>;

				reg = <0x1e78e000 0x20>;

				reg-shift = <2>;

				interrupts = <33>;

				clocks = <&clk_uart>;
@@ -250,7 +250,7 @@ 


			uart4: serial@1e78f000 {

				compatible = "ns16550a";

				reg = <0x1e78f000 0x1000>;

				reg = <0x1e78f000 0x20>;

				reg-shift = <2>;

				interrupts = <34>;

				clocks = <&clk_uart>;

arch/arm/boot/dts/aspeed-g5.dtsi

+9 −9
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ 
		serial2 = &uart3;

		serial3 = &uart4;

		serial4 = &uart5;

		serial5 = &vuart;

	};



	cpus {
@@ -229,7 +230,7 @@ 


			uart1: serial@1e783000 {

				compatible = "ns16550a";

				reg = <0x1e783000 0x1000>;

				reg = <0x1e783000 0x20>;

				reg-shift = <2>;

				interrupts = <9>;

				clocks = <&clk_uart>;
@@ -239,11 +240,10 @@ 


			uart5: serial@1e784000 {

				compatible = "ns16550a";

				reg = <0x1e784000 0x1000>;

				reg = <0x1e784000 0x20>;

				reg-shift = <2>;

				interrupts = <10>;

				clocks = <&clk_uart>;

				current-speed = <38400>;

				no-loopback-test;

				status = "disabled";

			};
@@ -297,9 +297,9 @@ 
				};

			};



			uart6: serial@1e787000 {

				compatible = "ns16550a";

				reg = <0x1e787000 0x1000>;

			vuart: serial@1e787000 {

				compatible = "aspeed,ast2500-vuart";

				reg = <0x1e787000 0x40>;

				reg-shift = <2>;

				interrupts = <10>;

				clocks = <&clk_uart>;
@@ -309,7 +309,7 @@ 


			uart2: serial@1e78d000 {

				compatible = "ns16550a";

				reg = <0x1e78d000 0x1000>;

				reg = <0x1e78d000 0x20>;

				reg-shift = <2>;

				interrupts = <32>;

				clocks = <&clk_uart>;
@@ -319,7 +319,7 @@ 


			uart3: serial@1e78e000 {

				compatible = "ns16550a";

				reg = <0x1e78e000 0x1000>;

				reg = <0x1e78e000 0x20>;

				reg-shift = <2>;

				interrupts = <33>;

				clocks = <&clk_uart>;
@@ -329,7 +329,7 @@ 


			uart4: serial@1e78f000 {

				compatible = "ns16550a";

				reg = <0x1e78f000 0x1000>;

				reg = <0x1e78f000 0x20>;

				reg-shift = <2>;

				interrupts = <34>;

				clocks = <&clk_uart>;

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