Commit a16afcdd authored by zhengbin's avatar zhengbin Committed by Alex Deucher
Browse files

drm/amd/powerplay: use true, false for bool variable in smu7_hwmgr.c



Fixes coccicheck warning:

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c:723:2-50: WARNING: Assignment of 0/1 to bool variable
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c:733:3-52: WARNING: Assignment of 0/1 to bool variable
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c:747:3-51: WARNING: Assignment of 0/1 to bool variable

Reported-by: default avatarHulk Robot <hulkci@huawei.com>
Signed-off-by: default avatarzhengbin <zhengbin13@huawei.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2639f453
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+3 −3
Original line number Diff line number Diff line
@@ -720,7 +720,7 @@ static int smu7_setup_dpm_tables_v0(struct pp_hwmgr *hwmgr)
		data->dpm_table.vddc_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v;
		data->dpm_table.vddc_table.dpm_levels[i].param1 = std_voltage_table->entries[i].Leakage;
		/* param1 is for corresponding std voltage */
		data->dpm_table.vddc_table.dpm_levels[i].enabled = 1;
		data->dpm_table.vddc_table.dpm_levels[i].enabled = true;
	}

	data->dpm_table.vddc_table.count = allowed_vdd_sclk_table->count;
@@ -730,7 +730,7 @@ static int smu7_setup_dpm_tables_v0(struct pp_hwmgr *hwmgr)
		/* Initialize Vddci DPM table based on allow Mclk values */
		for (i = 0; i < allowed_vdd_mclk_table->count; i++) {
			data->dpm_table.vddci_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v;
			data->dpm_table.vddci_table.dpm_levels[i].enabled = 1;
			data->dpm_table.vddci_table.dpm_levels[i].enabled = true;
		}
		data->dpm_table.vddci_table.count = allowed_vdd_mclk_table->count;
	}
@@ -744,7 +744,7 @@ static int smu7_setup_dpm_tables_v0(struct pp_hwmgr *hwmgr)
		 */
		for (i = 0; i < allowed_vdd_mclk_table->count; i++) {
			data->dpm_table.mvdd_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v;
			data->dpm_table.mvdd_table.dpm_levels[i].enabled = 1;
			data->dpm_table.mvdd_table.dpm_levels[i].enabled = true;
		}
		data->dpm_table.mvdd_table.count = allowed_vdd_mclk_table->count;
	}