Commit a157b3aa authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pwm/for-4.8-rc1' of... 

Merge tag 'pwm/for-4.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm updates from Thierry Reding:
 "This set of changes improve some aspects of the atomic API as well as
  make use of this new API in the regulator framework to allow properly
  dealing with critical regulators controlled by a PWM.

  Aside from that there's a bunch of updates and cleanups for existing
  drivers, as well as the addition of new drivers for the Broadcom
  iProc, STMPE and ChromeOS EC controllers"

* tag 'pwm/for-4.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (44 commits)
  regulator: pwm: Document pwm-dutycycle-unit and pwm-dutycycle-range
  regulator: pwm: Support extra continuous mode cases
  pwm: Add ChromeOS EC PWM driver
  dt-bindings: pwm: Add binding for ChromeOS EC PWM
  mfd: cros_ec: Add EC_PWM function definitions
  mfd: cros_ec: Add cros_ec_cmd_xfer_status() helper
  pwm: atmel: Use of_device_get_match_data()
  pwm: atmel: Fix checkpatch warnings
  pwm: atmel: Fix disabling of PWM channels
  dt-bindings: pwm: Add R-Car H3 device tree bindings
  pwm: rcar: Use ARCH_RENESAS
  pwm: tegra: Add support for Tegra186
  dt-bindings: pwm: tegra: Add compatible string for Tegra186
  pwm: tegra: Avoid overflow when calculating duty cycle
  pwm: tegra: Allow 100 % duty cycle
  pwm: tegra: Add support for reset control
  pwm: tegra: Rename mmio_base to regs
  pwm: tegra: Remove useless padding
  pwm: tegra: Drop NUM_PWM macro
  pwm: lpc32xx: Set PWM_PIN_LEVEL bit to default value
  ...
parents 32199ec3 53de7c26

Documentation/ABI/testing/sysfs-class-pwm

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@@ -77,3 +77,12 @@ Description: 
		Enable/disable the PWM signal.

		0 is disabled

		1 is enabled



What:		/sys/class/pwm/pwmchipN/pwmX/capture

Date:		June 2016

KernelVersion:	4.8

Contact:	Lee Jones <lee.jones@linaro.org>

Description:

		Capture information about a PWM signal. The output format is a

		pair unsigned integers (period and duty cycle), separated by a

		single space.

Documentation/devicetree/bindings/pwm/brcm,iproc-pwm.txt

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Broadcom iProc PWM controller device tree bindings



This controller has 4 channels.



Required Properties :

- compatible: must be "brcm,iproc-pwm"

- reg: physical base address and length of the controller's registers

- clocks: phandle + clock specifier pair for the external clock

- #pwm-cells: Should be 3. See pwm.txt in this directory for a

  description of the cells format.



Refer to clocks/clock-bindings.txt for generic clock consumer properties.



Example:



pwm: pwm@18031000 {

	compatible = "brcm,iproc-pwm";

	reg = <0x18031000 0x28>;

	clocks = <&osc>;

	#pwm-cells = <3>;

};

Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.txt

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* PWM controlled by ChromeOS EC



Google's ChromeOS EC PWM is a simple PWM attached to the Embedded Controller

(EC) and controlled via a host-command interface.



An EC PWM node should be only found as a sub-node of the EC node (see

Documentation/devicetree/bindings/mfd/cros-ec.txt).



Required properties:

- compatible: Must contain "google,cros-ec-pwm"

- #pwm-cells: Should be 1. The cell specifies the PWM index.



Example:

	cros-ec@0 {

		compatible = "google,cros-ec-spi";



		...



		cros_ec_pwm: ec-pwm {

			compatible = "google,cros-ec-pwm";

			#pwm-cells = <1>;

		};

	};

Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt

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Tegra SoC PWFM controller



Required properties:

- compatible: For Tegra20, must contain "nvidia,tegra20-pwm".  For Tegra30,

  must contain "nvidia,tegra30-pwm".  Otherwise, must contain

  "nvidia,<chip>-pwm", plus one of the above, where <chip> is tegra114,

  tegra124, tegra132, or tegra210.

- compatible: Must be:

  - "nvidia,tegra20-pwm": for Tegra20

  - "nvidia,tegra30-pwm", "nvidia,tegra20-pwm": for Tegra30

  - "nvidia,tegra114-pwm", "nvidia,tegra20-pwm": for Tegra114

  - "nvidia,tegra124-pwm", "nvidia,tegra20-pwm": for Tegra124

  - "nvidia,tegra132-pwm", "nvidia,tegra20-pwm": for Tegra132

  - "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210

  - "nvidia,tegra186-pwm": for Tegra186

- reg: physical base address and length of the controller's registers

- #pwm-cells: should be 2. See pwm.txt in this directory for a description of

  the cells format.

Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt

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@@ -7,6 +7,7 @@ Required Properties: 
 - "renesas,pwm-r8a7790": for R-Car H2

 - "renesas,pwm-r8a7791": for R-Car M2-W

 - "renesas,pwm-r8a7794": for R-Car E2

 - "renesas,pwm-r8a7795": for R-Car H3

- reg: base address and length of the registers block for the PWM.

- #pwm-cells: should be 2. See pwm.txt in this directory for a description of

  the cells format.

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