Commit a156e068 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'iommu-fixes-v4.1-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu 

Pull iommu fixes from Joerg Roedel:
 "Three fixes have queued up:

   - reference count fix in the AMD IOMMUv2 driver

   - sign extension fix in the ARM-SMMU driver

   - build fix for rockchip driver with device tree"

* tag 'iommu-fixes-v4.1-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu:
  iommu/arm-smmu: Fix sign-extension of upstream bus addresses at stage 1
  iommu/rockchip: Fix build without CONFIG_OF
  iommu/amd: Fix bug in put_pasid_state_wait
parents 9c922a55 5dc5616e

drivers/iommu/amd_iommu_v2.c

+1 −0
Original line number Diff line number Diff line
@@ -266,6 +266,7 @@ static void put_pasid_state(struct pasid_state *pasid_state) 


static void put_pasid_state_wait(struct pasid_state *pasid_state)

{

	atomic_dec(&pasid_state->count);

	wait_event(pasid_state->wq, !atomic_read(&pasid_state->count));

	free_pasid_state(pasid_state);

}

drivers/iommu/arm-smmu.c

+2 −28
Original line number Diff line number Diff line
@@ -224,14 +224,7 @@ 
#define RESUME_TERMINATE		(1 << 0)



#define TTBCR2_SEP_SHIFT		15

#define TTBCR2_SEP_MASK			0x7



#define TTBCR2_ADDR_32			0

#define TTBCR2_ADDR_36			1

#define TTBCR2_ADDR_40			2

#define TTBCR2_ADDR_42			3

#define TTBCR2_ADDR_44			4

#define TTBCR2_ADDR_48			5

#define TTBCR2_SEP_UPSTREAM		(0x7 << TTBCR2_SEP_SHIFT)



#define TTBRn_HI_ASID_SHIFT            16
@@ -793,26 +786,7 @@ static void arm_smmu_init_context_bank(struct arm_smmu_domain *smmu_domain, 
		writel_relaxed(reg, cb_base + ARM_SMMU_CB_TTBCR);

		if (smmu->version > ARM_SMMU_V1) {

			reg = pgtbl_cfg->arm_lpae_s1_cfg.tcr >> 32;

			switch (smmu->va_size) {

			case 32:

				reg |= (TTBCR2_ADDR_32 << TTBCR2_SEP_SHIFT);

				break;

			case 36:

				reg |= (TTBCR2_ADDR_36 << TTBCR2_SEP_SHIFT);

				break;

			case 40:

				reg |= (TTBCR2_ADDR_40 << TTBCR2_SEP_SHIFT);

				break;

			case 42:

				reg |= (TTBCR2_ADDR_42 << TTBCR2_SEP_SHIFT);

				break;

			case 44:

				reg |= (TTBCR2_ADDR_44 << TTBCR2_SEP_SHIFT);

				break;

			case 48:

				reg |= (TTBCR2_ADDR_48 << TTBCR2_SEP_SHIFT);

				break;

			}

			reg |= TTBCR2_SEP_UPSTREAM;

			writel_relaxed(reg, cb_base + ARM_SMMU_CB_TTBCR2);

		}

	} else {

drivers/iommu/rockchip-iommu.c

+1 −3
Original line number Diff line number Diff line
@@ -1004,20 +1004,18 @@ static int rk_iommu_remove(struct platform_device *pdev) 
	return 0;

}



#ifdef CONFIG_OF

static const struct of_device_id rk_iommu_dt_ids[] = {

	{ .compatible = "rockchip,iommu" },

	{ /* sentinel */ }

};

MODULE_DEVICE_TABLE(of, rk_iommu_dt_ids);

#endif



static struct platform_driver rk_iommu_driver = {

	.probe = rk_iommu_probe,

	.remove = rk_iommu_remove,

	.driver = {

		   .name = "rk_iommu",

		   .of_match_table = of_match_ptr(rk_iommu_dt_ids),

		   .of_match_table = rk_iommu_dt_ids,

	},

};

CRA Git | Maintained and supported by SUSTech CRA and CCSE