drm/i915: WARN if max vswing/pre-emphasis violates the DP spec (a133c698) · Commits · 戴 / test

According to the DP spec a DPTX must support vswing/pre-emphasis up to and including level 2. Level 3 is optional (actually DP 1.4a seems to make even level 3 mandatory for HBR2/3, while leaving it optional for RBR/HBR1). WARN if out encoders' .voltage_max()/.preemph_max() return an illegal value. Signed-off-by:

Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:

José Roberto de Souza <jose.souza@intel.com> Signed-off-by:

José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200709145845.18118-1-ville.syrjala@linux.intel.com

drivers/gpu/drm/i915/display/intel_dp_link_training.c

+9 −0

Original line number	Diff line number	Diff line
		@@ -52,6 +52,7 @@ static u8 dp_voltage_max(u8 preemph)
		void intel_dp_get_adjust_train(struct intel_dp *intel_dp,
		const u8 link_status[DP_LINK_STATUS_SIZE])
		{
		struct drm_i915_private *i915 = dp_to_i915(intel_dp);
		u8 v = 0;
		u8 p = 0;
		int lane;
		@@ -64,12 +65,20 @@ void intel_dp_get_adjust_train(struct intel_dp *intel_dp,
		}

		preemph_max = intel_dp->preemph_max(intel_dp);
		drm_WARN_ON_ONCE(&i915->drm,
		preemph_max != DP_TRAIN_PRE_EMPH_LEVEL_2 &&
		preemph_max != DP_TRAIN_PRE_EMPH_LEVEL_3);

		if (p >= preemph_max)
		p = preemph_max \| DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;

		v = min(v, dp_voltage_max(p));

		voltage_max = intel_dp->voltage_max(intel_dp);
		drm_WARN_ON_ONCE(&i915->drm,
		voltage_max != DP_TRAIN_VOLTAGE_SWING_LEVEL_2 &&
		voltage_max != DP_TRAIN_VOLTAGE_SWING_LEVEL_3);

		if (v >= voltage_max)
		v = voltage_max \| DP_TRAIN_MAX_SWING_REACHED;

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