Commit a103f347 authored by Masato Noguchi's avatar Masato Noguchi Committed by Arnd Bergmann
Browse files

[CELL] spufs: limit saving MFC_CNTL bits 



At save step 8, the mfc control register in the CSA should be written
_only_ with Sc and Sm bits (at least MFC_CNTL[Dh] should be set to 0)

Signed-off-by: default avatarMasato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: default avatarJeremy Kerr <jk@ozlabs.org>
Signed-off-by: default avatarArnd Bergmann <arnd.bergmann@de.ibm.com>
parent d40a01d4

arch/powerpc/platforms/cell/spufs/switch.c

+4 −9
Original line number Diff line number Diff line
@@ -180,7 +180,7 @@ static inline void save_mfc_cntl(struct spu_state *csa, struct spu *spu) 
	case MFC_CNTL_SUSPEND_COMPLETE:

		if (csa) {

			csa->priv2.mfc_control_RW =

				in_be64(&priv2->mfc_control_RW) |

				MFC_CNTL_SUSPEND_MASK |

				MFC_CNTL_SUSPEND_DMA_QUEUE;

		}

		break;
@@ -190,9 +190,7 @@ static inline void save_mfc_cntl(struct spu_state *csa, struct spu *spu) 
				  MFC_CNTL_SUSPEND_DMA_STATUS_MASK) ==

				 MFC_CNTL_SUSPEND_COMPLETE);

		if (csa) {

			csa->priv2.mfc_control_RW =

				in_be64(&priv2->mfc_control_RW) &

				~MFC_CNTL_SUSPEND_DMA_QUEUE;

			csa->priv2.mfc_control_RW = 0;

		}

		break;

	}
@@ -251,11 +249,8 @@ static inline void save_mfc_decr(struct spu_state *csa, struct spu *spu) 
	 *     Read MFC_CNTL[Ds].  Update saved copy of

	 *     CSA.MFC_CNTL[Ds].

	 */

	if (in_be64(&priv2->mfc_control_RW) & MFC_CNTL_DECREMENTER_RUNNING) {

		csa->priv2.mfc_control_RW |= MFC_CNTL_DECREMENTER_RUNNING;

	} else {

		csa->priv2.mfc_control_RW &= ~MFC_CNTL_DECREMENTER_RUNNING;

	}

	csa->priv2.mfc_control_RW |=

		in_be64(&priv2->mfc_control_RW) & MFC_CNTL_DECREMENTER_RUNNING;

}



static inline void halt_mfc_decr(struct spu_state *csa, struct spu *spu)

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