drm/i915: Relocate intel_hpd_{enabled,hotplug}_irqs() (a0e066b8) · Commits · 戴 / test

drivers/gpu/drm/i915/i915_irq.c

+25 −25

Original line number	Diff line number	Diff line
		@@ -1205,6 +1205,31 @@ static void intel_get_hpd_pins(struct drm_i915_private *dev_priv,

		}

		static u32 intel_hpd_enabled_irqs(struct drm_i915_private *dev_priv,
		const u32 hpd[HPD_NUM_PINS])
		{
		struct intel_encoder *encoder;
		u32 enabled_irqs = 0;

		for_each_intel_encoder(&dev_priv->drm, encoder)
		if (dev_priv->hotplug.stats[encoder->hpd_pin].state == HPD_ENABLED)
		enabled_irqs \|= hpd[encoder->hpd_pin];

		return enabled_irqs;
		}

		static u32 intel_hpd_hotplug_irqs(struct drm_i915_private *dev_priv,
		const u32 hpd[HPD_NUM_PINS])
		{
		struct intel_encoder *encoder;
		u32 hotplug_irqs = 0;

		for_each_intel_encoder(&dev_priv->drm, encoder)
		hotplug_irqs \|= hpd[encoder->hpd_pin];

		return hotplug_irqs;
		}

		static void gmbus_irq_handler(struct drm_i915_private *dev_priv)
		{
		wake_up_all(&dev_priv->gmbus_wait_queue);
		@@ -3145,31 +3170,6 @@ static void cherryview_irq_reset(struct drm_i915_private *dev_priv)
		spin_unlock_irq(&dev_priv->irq_lock);
		}

		static u32 intel_hpd_enabled_irqs(struct drm_i915_private *dev_priv,
		const u32 hpd[HPD_NUM_PINS])
		{
		struct intel_encoder *encoder;
		u32 enabled_irqs = 0;

		for_each_intel_encoder(&dev_priv->drm, encoder)
		if (dev_priv->hotplug.stats[encoder->hpd_pin].state == HPD_ENABLED)
		enabled_irqs \|= hpd[encoder->hpd_pin];

		return enabled_irqs;
		}

		static u32 intel_hpd_hotplug_irqs(struct drm_i915_private *dev_priv,
		const u32 hpd[HPD_NUM_PINS])
		{
		struct intel_encoder *encoder;
		u32 hotplug_irqs = 0;

		for_each_intel_encoder(&dev_priv->drm, encoder)
		hotplug_irqs \|= hpd[encoder->hpd_pin];

		return hotplug_irqs;
		}

		static void ibx_hpd_detection_setup(struct drm_i915_private *dev_priv)
		{
		u32 hotplug;

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