Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6 (a0bfb673) · Commits · 戴 / test

Documentation/MSI-HOWTO.txt

+2 −4

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		@@ -236,10 +236,8 @@ software system can set different pages for controlling accesses to the
		MSI-X structure. The implementation of MSI support requires the PCI
		subsystem, not a device driver, to maintain full control of the MSI-X
		table/MSI-X PBA (Pending Bit Array) and MMIO address space of the MSI-X
		table/MSI-X PBA. A device driver is prohibited from requesting the MMIO
		address space of the MSI-X table/MSI-X PBA. Otherwise, the PCI subsystem
		will fail enabling MSI-X on its hardware device when it calls the function
		pci_enable_msix().
		table/MSI-X PBA. A device driver should not access the MMIO address
		space of the MSI-X table/MSI-X PBA.

		5.3.2 API pci_enable_msix

Documentation/PCI/pci.txt

+4 −0

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		@@ -163,6 +163,10 @@ need pass only as many optional fields as necessary:
		o class and classmask fields default to 0
		o driver_data defaults to 0UL.

		Note that driver_data must match the value used by any of the pci_device_id
		entries defined in the driver. This makes the driver_data field mandatory
		if all the pci_device_id entries have a non-zero driver_data value.

		Once added, the driver probe routine will be invoked for any unclaimed
		PCI devices listed in its (newly updated) pci_ids list.

Documentation/PCI/pcieaer-howto.txt

+3 −8

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		@@ -203,22 +203,17 @@ to mmio_enabled.

		3.3 helper functions

		3.3.1 int pci_find_aer_capability(struct pci_dev *dev);
		pci_find_aer_capability locates the PCI Express AER capability
		in the device configuration space. If the device doesn't support
		PCI-Express AER, the function returns 0.

		3.3.2 int pci_enable_pcie_error_reporting(struct pci_dev *dev);
		3.3.1 int pci_enable_pcie_error_reporting(struct pci_dev *dev);
		pci_enable_pcie_error_reporting enables the device to send error
		messages to root port when an error is detected. Note that devices
		don't enable the error reporting by default, so device drivers need
		call this function to enable it.

		3.3.3 int pci_disable_pcie_error_reporting(struct pci_dev *dev);
		3.3.2 int pci_disable_pcie_error_reporting(struct pci_dev *dev);
		pci_disable_pcie_error_reporting disables the device to send error
		messages to root port when an error is detected.

		3.3.4 int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev);
		3.3.3 int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev);
		pci_cleanup_aer_uncorrect_error_status cleanups the uncorrectable
		error status register.

Documentation/kernel-parameters.txt

+19 −12

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		@@ -101,6 +101,7 @@ parameter is applicable:
		X86-64 X86-64 architecture is enabled.
		More X86-64 boot options can be found in
		Documentation/x86_64/boot-options.txt .
		X86 Either 32bit or 64bit x86 (same as X86-32+X86-64)

		In addition, the following text indicates that the option:

		@@ -1588,7 +1589,7 @@ and is between 256 and 4096 characters. It is defined in the file
		See also Documentation/paride.txt.

		pci=option[,option...] [PCI] various PCI subsystem options:
		off [X86-32] don't probe for the PCI bus
		off [X86] don't probe for the PCI bus
		bios [X86-32] force use of PCI BIOS, don't access
		the hardware directly. Use this if your machine
		has a non-standard PCI host bridge.
		@@ -1596,9 +1597,9 @@ and is between 256 and 4096 characters. It is defined in the file
		hardware access methods are allowed. Use this
		if you experience crashes upon bootup and you
		suspect they are caused by the BIOS.
		conf1 [X86-32] Force use of PCI Configuration
		conf1 [X86] Force use of PCI Configuration
		Mechanism 1.
		conf2 [X86-32] Force use of PCI Configuration
		conf2 [X86] Force use of PCI Configuration
		Mechanism 2.
		noaer [PCIE] If the PCIEAER kernel config parameter is
		enabled, this kernel boot option can be used to
		@@ -1618,37 +1619,37 @@ and is between 256 and 4096 characters. It is defined in the file
		this option if the kernel is unable to allocate
		IRQs or discover secondary PCI buses on your
		motherboard.
		rom [X86-32] Assign address space to expansion ROMs.
		rom [X86] Assign address space to expansion ROMs.
		Use with caution as certain devices share
		address decoders between ROMs and other
		resources.
		norom [X86-32,X86_64] Do not assign address space to
		norom [X86] Do not assign address space to
		expansion ROMs that do not already have
		BIOS assigned address ranges.
		irqmask=0xMMMM [X86-32] Set a bit mask of IRQs allowed to be
		irqmask=0xMMMM [X86] Set a bit mask of IRQs allowed to be
		assigned automatically to PCI devices. You can
		make the kernel exclude IRQs of your ISA cards
		this way.
		pirqaddr=0xAAAAA [X86-32] Specify the physical address
		pirqaddr=0xAAAAA [X86] Specify the physical address
		of the PIRQ table (normally generated
		by the BIOS) if it is outside the
		F0000h-100000h range.
		lastbus=N [X86-32] Scan all buses thru bus #N. Can be
		lastbus=N [X86] Scan all buses thru bus #N. Can be
		useful if the kernel is unable to find your
		secondary buses and you want to tell it
		explicitly which ones they are.
		assign-busses [X86-32] Always assign all PCI bus
		assign-busses [X86] Always assign all PCI bus
		numbers ourselves, overriding
		whatever the firmware may have done.
		usepirqmask [X86-32] Honor the possible IRQ mask stored
		usepirqmask [X86] Honor the possible IRQ mask stored
		in the BIOS $PIR table. This is needed on
		some systems with broken BIOSes, notably
		some HP Pavilion N5400 and Omnibook XE3
		notebooks. This will have no effect if ACPI
		IRQ routing is enabled.
		noacpi [X86-32] Do not use ACPI for IRQ routing
		noacpi [X86] Do not use ACPI for IRQ routing
		or for PCI scanning.
		use_crs [X86-32] Use _CRS for PCI resource
		use_crs [X86] Use _CRS for PCI resource
		allocation.
		routeirq Do IRQ routing for all PCI devices.
		This is normally done in pci_enable_device(),
		@@ -1677,6 +1678,12 @@ and is between 256 and 4096 characters. It is defined in the file
		reserved for the CardBus bridge's memory
		window. The default value is 64 megabytes.

		pcie_aspm= [PCIE] Forcibly enable or disable PCIe Active State Power
		Management.
		off Disable ASPM.
		force Enable ASPM even on devices that claim not to support it.
		WARNING: Forcing ASPM on may cause system lockups.

		pcmv= [HW,PCMCIA] BadgePAD 4

		pd. [PARIDE]

arch/ia64/include/asm/pci.h

+2 −10

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		@@ -95,16 +95,8 @@ extern int pci_mmap_page_range (struct pci_dev dev, struct vm_area_struct vma,
		enum pci_mmap_state mmap_state, int write_combine);
		#define HAVE_PCI_LEGACY
		extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
		struct vm_area_struct *vma);
		extern ssize_t pci_read_legacy_io(struct kobject *kobj,
		struct bin_attribute *bin_attr,
		char *buf, loff_t off, size_t count);
		extern ssize_t pci_write_legacy_io(struct kobject *kobj,
		struct bin_attribute *bin_attr,
		char *buf, loff_t off, size_t count);
		extern int pci_mmap_legacy_mem(struct kobject *kobj,
		struct bin_attribute *attr,
		struct vm_area_struct *vma);
		struct vm_area_struct *vma,
		enum pci_mmap_state mmap_state);

		#define pci_get_legacy_mem platform_pci_get_legacy_mem
		#define pci_legacy_read platform_pci_legacy_read

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