Commit a04e84c5 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'socfpga_update_for_v5.9' of...

Merge tag 'socfpga_update_for_v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/soc

SoCFPGA update for v5.9, part 2
- Add missing put_device() call in socfpga base power management support

* tag 'socfpga_update_for_v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: socfpga: PM: add missing put_device() call in socfpga_setup_ocram_self_refresh()
  ARM: dts: socfpga: add the temperature sensor to the Arria10 devkit
  arm: dts: socfpga: add reset-names to spi node
  arm64: dts: agilex: add nand clocks
  arm64: dts: agilex: populate clock dts entries for Intel SoCFPGA Agilex

Link: https://lore.kernel.org/r/20200729165037.3099-1-dinguyen@kernel.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 552c0e30 3ad7b4e8
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+2 −0
Original line number Diff line number Diff line
@@ -829,6 +829,7 @@
			num-cs = <4>;
			clocks = <&spi_m_clk>;
			resets = <&rst SPIM0_RESET>;
			reset-names = "spi";
			status = "disabled";
		};

@@ -841,6 +842,7 @@
			num-cs = <4>;
			clocks = <&spi_m_clk>;
			resets = <&rst SPIM1_RESET>;
			reset-names = "spi";
			status = "disabled";
		};

+2 −0
Original line number Diff line number Diff line
@@ -613,6 +613,7 @@
			/*32bit_access;*/
			clocks = <&spi_m_clk>;
			resets = <&rst SPIM0_RESET>;
			reset-names = "spi";
			status = "disabled";
		};

@@ -628,6 +629,7 @@
			rx-dma-channel = <&pdma 17>;
			clocks = <&spi_m_clk>;
			resets = <&rst SPIM1_RESET>;
			reset-names = "spi";
			status = "disabled";
		};

+5 −0
Original line number Diff line number Diff line
@@ -162,6 +162,11 @@
		compatible = "ltc2977";
		reg = <0x5c>;
	};

	temp@4c {
		compatible = "maxim,max1619";
		reg = <0x4c>;
	};
};

&uart1 {
+5 −3
Original line number Diff line number Diff line
@@ -49,14 +49,14 @@ static int socfpga_setup_ocram_self_refresh(void)
	if (!ocram_pool) {
		pr_warn("%s: ocram pool unavailable!\n", __func__);
		ret = -ENODEV;
		goto put_node;
		goto put_device;
	}

	ocram_base = gen_pool_alloc(ocram_pool, socfpga_sdram_self_refresh_sz);
	if (!ocram_base) {
		pr_warn("%s: unable to alloc ocram!\n", __func__);
		ret = -ENOMEM;
		goto put_node;
		goto put_device;
	}

	ocram_pbase = gen_pool_virt_to_phys(ocram_pool, ocram_base);
@@ -67,7 +67,7 @@ static int socfpga_setup_ocram_self_refresh(void)
	if (!suspend_ocram_base) {
		pr_warn("%s: __arm_ioremap_exec failed!\n", __func__);
		ret = -ENOMEM;
		goto put_node;
		goto put_device;
	}

	/* Copy the code that puts DDR in self refresh to ocram */
@@ -81,6 +81,8 @@ static int socfpga_setup_ocram_self_refresh(void)
	if (!socfpga_sdram_self_refresh_in_ocram)
		ret = -EFAULT;

put_device:
	put_device(&pdev->dev);
put_node:
	of_node_put(np);

+2 −0
Original line number Diff line number Diff line
@@ -380,6 +380,7 @@
			reg = <0xffda4000 0x1000>;
			interrupts = <0 99 4>;
			resets = <&rst SPIM0_RESET>;
			reset-names = "spi";
			reg-io-width = <4>;
			num-cs = <4>;
			clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>;
@@ -393,6 +394,7 @@
			reg = <0xffda5000 0x1000>;
			interrupts = <0 100 4>;
			resets = <&rst SPIM1_RESET>;
			reset-names = "spi";
			reg-io-width = <4>;
			num-cs = <4>;
			clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>;
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