Commit a021ada2 authored by Antoine Tenart's avatar Antoine Tenart Committed by David S. Miller
Browse files

net: phy: mscc-miim: read poll when high resolution timers are disabled



The driver uses a read polling mechanism to check the status of the MDIO
bus, to know if it is ready to accept next commands. This polling
mechanism uses usleep_delay() under the hood between reads which is fine
as long as high resolution timers are enabled. Otherwise the delays will
end up to be much longer than expected.

This patch fixes this by using udelay() under the hood when
CONFIG_HIGH_RES_TIMERS isn't enabled. This increases CPU usage.

Signed-off-by: default avatarAntoine Tenart <antoine.tenart@bootlin.com>
Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent d9c6de35
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+2 −1
Original line number Diff line number Diff line
@@ -184,7 +184,8 @@ config MDIO_MSCC_MIIM
	depends on HAS_IOMEM
	help
	  This driver supports the MIIM (MDIO) interface found in the network
	  switches of the Microsemi SoCs
	  switches of the Microsemi SoCs; it is recommended to switch on
	  CONFIG_HIGH_RES_TIMERS

config MDIO_MVUSB
	tristate "Marvell USB to MDIO Adapter"
+17 −5
Original line number Diff line number Diff line
@@ -39,13 +39,25 @@ struct mscc_miim_dev {
	void __iomem *phy_regs;
};

/* When high resolution timers aren't built-in: we can't use usleep_range() as
 * we would sleep way too long. Use udelay() instead.
 */
#define mscc_readl_poll_timeout(addr, val, cond, delay_us, timeout_us)	\
({									\
	if (!IS_ENABLED(CONFIG_HIGH_RES_TIMERS))			\
		readl_poll_timeout_atomic(addr, val, cond, delay_us,	\
					  timeout_us);			\
	readl_poll_timeout(addr, val, cond, delay_us, timeout_us);	\
})

static int mscc_miim_wait_ready(struct mii_bus *bus)
{
	struct mscc_miim_dev *miim = bus->priv;
	u32 val;

	return readl_poll_timeout(miim->regs + MSCC_MIIM_REG_STATUS, val,
				  !(val & MSCC_MIIM_STATUS_STAT_BUSY), 50, 10000);
	return mscc_readl_poll_timeout(miim->regs + MSCC_MIIM_REG_STATUS, val,
				       !(val & MSCC_MIIM_STATUS_STAT_BUSY), 50,
				       10000);
}

static int mscc_miim_wait_pending(struct mii_bus *bus)
@@ -53,7 +65,7 @@ static int mscc_miim_wait_pending(struct mii_bus *bus)
	struct mscc_miim_dev *miim = bus->priv;
	u32 val;

	return readl_poll_timeout(miim->regs + MSCC_MIIM_REG_STATUS, val,
	return mscc_readl_poll_timeout(miim->regs + MSCC_MIIM_REG_STATUS, val,
				       !(val & MSCC_MIIM_STATUS_STAT_PENDING),
				       50, 10000);
}