dt-bindings: mailbox: Add devicetree binding for Qcom IPCC

# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/mailbox/qcom-ipcc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Technologies, Inc. Inter-Processor Communication Controller

maintainers:

  - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

description:

  The Inter-Processor Communication Controller (IPCC) is a centralized hardware

  to route interrupts across various subsystems. It involves a three-level

  addressing scheme called protocol, client and signal. For example, consider an

  entity on the Application Processor Subsystem (APSS) that wants to listen to

  Modem's interrupts via Shared Memory Point to Point (SMP2P) interface. In such

  a case, the client would be Modem (client-id is 2) and the signal would be

  SMP2P (signal-id is 2). The SMP2P itself falls under the Multiprocessor (MPROC)

  protocol (protocol-id is 0). Refer include/dt-bindings/mailbox/qcom-ipcc.h

  for the list of such IDs.

properties:

  compatible:

    items:

      - enum:

        - qcom,sm8250-ipcc

      - const: qcom,ipcc

  reg:

    maxItems: 1

  interrupts:

    maxItems: 1

  interrupt-controller: true

  "#interrupt-cells":

    const: 3

    description:

      The first cell is the client-id, the second cell is the signal-id and the

      third cell is the interrupt type.

  "#mbox-cells":

    const: 2

    description:

      The first cell is the client-id, and the second cell is the signal-id.

required:

  - compatible

  - reg

  - interrupts

  - interrupt-controller

  - "#interrupt-cells"

  - "#mbox-cells"

additionalProperties: false

examples:

  - |

        #include <dt-bindings/interrupt-controller/arm-gic.h>

        #include <dt-bindings/mailbox/qcom-ipcc.h>

        mailbox@408000 {

                compatible = "qcom,sm8250-ipcc", "qcom,ipcc";

                reg = <0x408000 0x1000>;

                interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;

                interrupt-controller;

                #interrupt-cells = <3>;

                #mbox-cells = <2>;

        };

        smp2p-modem {

                compatible = "qcom,smp2p";

                interrupts-extended = <&ipcc_mproc IPCC_CLIENT_MPSS

                                IPCC_MPROC_SIGNAL_SMP2P IRQ_TYPE_EDGE_RISING>;

                mboxes = <&ipcc_mproc IPCC_CLIENT_MPSS IPCC_MPROC_SIGNAL_SMP2P>;

                /* Other SMP2P fields */

        };

/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */

/*

 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.

 */

#ifndef __DT_BINDINGS_MAILBOX_IPCC_H

#define __DT_BINDINGS_MAILBOX_IPCC_H

/* Signal IDs for MPROC protocol */

#define IPCC_MPROC_SIGNAL_GLINK_QMP	0

#define IPCC_MPROC_SIGNAL_SMP2P		2

#define IPCC_MPROC_SIGNAL_PING		3

/* Client IDs */

#define IPCC_CLIENT_AOP			0

#define IPCC_CLIENT_TZ			1

#define IPCC_CLIENT_MPSS		2

#define IPCC_CLIENT_LPASS		3

#define IPCC_CLIENT_SLPI		4

#define IPCC_CLIENT_SDC			5

#define IPCC_CLIENT_CDSP		6

#define IPCC_CLIENT_NPU			7

#define IPCC_CLIENT_APSS		8

#define IPCC_CLIENT_GPU			9

#define IPCC_CLIENT_CVP			10

#define IPCC_CLIENT_CAM			11

#define IPCC_CLIENT_VPU			12

#define IPCC_CLIENT_PCIE0		13

#define IPCC_CLIENT_PCIE1		14

#define IPCC_CLIENT_PCIE2		15

#define IPCC_CLIENT_SPSS		16

#endif