Commit 9f68e365 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-next-2020-01-30' of git://anongit.freedesktop.org/drm/drm

Pull drm updates from Davbe Airlie:
 "This is the main pull request for graphics for 5.6. Usual selection of
  changes all over.

  I've got one outstanding vmwgfx pull that touches mm so kept it
  separate until after all of this lands. I'll try and get it to you
  soon after this, but it might be early next week (nothing wrong with
  code, just my schedule is messy)

  This also hits a lot of fbdev drivers with some cleanups.

  Other notables:
   - vulkan timeline semaphore support added to syncobjs
   - nouveau turing secureboot/graphics support
   - Displayport MST display stream compression support

  Detailed summary:

  uapi:
   - dma-buf heaps added (and fixed)
   - command line add support for panel oreientation
   - command line allow overriding penguin count

  drm:
   - mipi dsi definition updates
   - lockdep annotations for dma_resv
   - remove dma-buf kmap/kunmap support
   - constify fb_ops in all fbdev drivers
   - MST fix for daisy chained hotplug-
   - CTA-861-G modes with VIC >= 193 added
   - fix drm_panel_of_backlight export
   - LVDS decoder support
   - more device based logging support
   - scanline alighment for dumb buffers
   - MST DSC helpers

  scheduler:
   - documentation fixes
   - job distribution improvements

  panel:
   - Logic PD type 28 panel support
   - Jimax8729d MIPI-DSI
   - igenic JZ4770
   - generic DSI devicetree bindings
   - sony acx424AKP panel
   - Leadtek LTK500HD1829
   - xinpeng XPP055C272
   - AUO B116XAK01
   - GiantPlus GPM940B0
   - BOE NV140FHM-N49
   - Satoz SAT050AT40H12R2
   - Sharp LS020B1DD01D panels.

  ttm:
   - use blocking WW lock

  i915:
   - hw/uapi state separation
   - Lock annotation improvements
   - selftest improvements
   - ICL/TGL DSI VDSC support
   - VBT parsing improvments
   - Display refactoring
   - DSI updates + fixes
   - HDCP 2.2 for CFL
   - CML PCI ID fixes
   - GLK+ fbc fix
   - PSR fixes
   - GEN/GT refactor improvments
   - DP MST fixes
   - switch context id alloc to xarray
   - workaround updates
   - LMEM debugfs support
   - tiled monitor fixes
   - ICL+ clock gating programming removed
   - DP MST disable sequence fixed
   - LMEM discontiguous object maps
   - prefaulting for discontiguous objects
   - use LMEM for dumb buffers if possible
   - add LMEM mmap support

  amdgpu:
   - enable sync object timelines for vulkan
   - MST atomic routines
   - enable MST DSC support
   - add DMCUB display microengine support
   - DC OEM i2c support
   - Renoir DC fixes
   - Initial HDCP 2.x support
   - BACO support for Arcturus
   - Use BACO for runtime PM power save
   - gfxoff on navi10
   - gfx10 golden updates and fixes
   - DCN support on POWER
   - GFXOFF for raven1 refresh
   - MM engine idle handlers cleanup
   - 10bpc EDP panel fixes
   - renoir watermark fixes
   - SR-IOV fixes
   - Arcturus VCN fixes
   - GDDR6 training fixes
   - freesync fixes
   - Pollock support

  amdkfd:
   - unify more codepath with amdgpu
   - use KIQ to setup HIQ rather than MMIO

  radeon:
   - fix vma fault handler race
   - PPC DMA fix
   - register check fixes for r100/r200

  nouveau:
   - mmap_sem vs dma_resv fix
   - rewrite the ACR secure boot code for Turing
   - TU10x graphics engine support (TU11x pending)
   - Page kind mapping for turing
   - 10-bit LUT support
   - GP10B Tegra fixes
   - HD audio regression fix

  hisilicon/hibmc:
   - use generic fbdev code and helpers

  rockchip:
   - dsi/px30 support

  virtio:
   - fb damage support
   - static some functions

  vc4:
   - use dma_resv lock wrappers

  msm:
   - use dma_resv lock wrappers
   - sc7180 display + DSI support
   - a618 support
   - UBWC support improvements

  vmwgfx:
   - updates + new logging uapi

  exynos:
   - enable/disable callback cleanups

  etnaviv:
   - use dma_resv lock wrappers

  atmel-hlcdc:
   - clock fixes

  mediatek:
   - cmdq support
   - non-smooth cursor fixes
   - ctm property support

  sun4i:
   - suspend support
   - A64 mipi dsi support

  rcar-du:
   - Color management module support
   - LVDS encoder dual-link support
   - R8A77980 support

  analogic:
   - add support for an6345

  ast:
   - atomic modeset support
   - primary plane garbage fix

  arcgpu:
   - fixes for fourcc handling

  tegra:
   - minor fixes and improvments

  mcde:
   - vblank support

  meson:
   - OSD1 plane AFBC commit

  gma500:
   - add pageflip support
   - reomve global drm_dev

  komeda:
   - tweak debugfs output
   - d32 support
   - runtime PM suppotr

  udl:
   - use generic shmem helpers
   - cleanup and fixes"

* tag 'drm-next-2020-01-30' of git://anongit.freedesktop.org/drm/drm: (1998 commits)
  drm/nouveau/fb/gp102-: allow module to load even when scrubber binary is missing
  drm/nouveau/acr: return error when registering LSF if ACR not supported
  drm/nouveau/disp/gv100-: not all channel types support reporting error codes
  drm/nouveau/disp/nv50-: prevent oops when no channel method map provided
  drm/nouveau: support synchronous pushbuf submission
  drm/nouveau: signal pending fences when channel has been killed
  drm/nouveau: reject attempts to submit to dead channels
  drm/nouveau: zero vma pointer even if we only unreference it rather than free
  drm/nouveau: Add HD-audio component notifier support
  drm/nouveau: fix build error without CONFIG_IOMMU_API
  drm/nouveau/kms/nv04: remove set but not used variable 'width'
  drm/nouveau/kms/nv50: remove set but not unused variable 'nv_connector'
  drm/nouveau/mmu: fix comptag memory leak
  drm/nouveau/gr/gp10b: Use gp100_grctx and gp100_gr_zbc
  drm/nouveau/pmu/gm20b,gp10b: Fix Falcon bootstrapping
  drm/exynos: Rename Exynos to lowercase
  drm/exynos: change callback names
  drm/mst: Don't do atomic checks over disabled managers
  drm/amdgpu: add the lost mutex_init back
  drm/amd/display: skip opp blank or unblank if test pattern enabled
  ...
parents 4cadc60d d47c7f06
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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-backend.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Allwinner A10 Display Engine Backend Device Tree Bindings

maintainers:
  - Chen-Yu Tsai <wens@csie.org>
  - Maxime Ripard <mripard@kernel.org>

description: |
  The display engine backend exposes layers and sprites to the system.

properties:
  compatible:
    enum:
      - allwinner,sun4i-a10-display-backend
      - allwinner,sun5i-a13-display-backend
      - allwinner,sun6i-a31-display-backend
      - allwinner,sun7i-a20-display-backend
      - allwinner,sun8i-a23-display-backend
      - allwinner,sun8i-a33-display-backend
      - allwinner,sun9i-a80-display-backend

  reg:
    minItems: 1
    maxItems: 2
    items:
      - description: Display Backend registers
      - description: SAT registers

  reg-names:
    minItems: 1
    maxItems: 2
    items:
      - const: be
      - const: sat

  interrupts:
    maxItems: 1

  clocks:
    minItems: 3
    maxItems: 4
    items:
      - description: The backend interface clock
      - description: The backend module clock
      - description: The backend DRAM clock
      - description: The SAT clock

  clock-names:
    minItems: 3
    maxItems: 4
    items:
      - const: ahb
      - const: mod
      - const: ram
      - const: sat

  resets:
    minItems: 1
    maxItems: 2
    items:
      - description: The Backend reset line
      - description: The SAT reset line

  reset-names:
    minItems: 1
    maxItems: 2
    items:
      - const: be
      - const: sat

  # FIXME: This should be made required eventually once every SoC will
  # have the MBUS declared.
  interconnects:
    maxItems: 1

  # FIXME: This should be made required eventually once every SoC will
  # have the MBUS declared.
  interconnect-names:
    const: dma-mem

  ports:
    type: object
    description: |
      A ports node with endpoint definitions as defined in
      Documentation/devicetree/bindings/media/video-interfaces.txt.

    properties:
      "#address-cells":
        const: 1

      "#size-cells":
        const: 0

      port@0:
        type: object
        description: |
          Input endpoints of the controller.

      port@1:
        type: object
        description: |
          Output endpoints of the controller.

    required:
      - "#address-cells"
      - "#size-cells"
      - port@0
      - port@1

    additionalProperties: false

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - resets
  - ports

additionalProperties: false

if:
  properties:
    compatible:
      contains:
        const: allwinner,sun8i-a33-display-backend

then:
  properties:
    reg:
      minItems: 2

    reg-names:
      minItems: 2

    clocks:
      minItems: 4

    clock-names:
      minItems: 4

    resets:
      minItems: 2

    reset-names:
      minItems: 2

  required:
    - reg-names
    - reset-names

else:
  properties:
    reg:
      maxItems: 1

    reg-names:
      maxItems: 1

    clocks:
      maxItems: 3

    clock-names:
      maxItems: 3

    resets:
      maxItems: 1

    reset-names:
      maxItems: 1

examples:
  - |
    /*
     * This comes from the clock/sun4i-a10-ccu.h and
     * reset/sun4i-a10-ccu.h headers, but we can't include them since
     * it would trigger a bunch of warnings for redefinitions of
     * symbols with the other example.
     */

    #define CLK_AHB_DE_BE0	42
    #define CLK_DRAM_DE_BE0	140
    #define CLK_DE_BE0		144
    #define RST_DE_BE0		5

    display-backend@1e60000 {
        compatible = "allwinner,sun4i-a10-display-backend";
        reg = <0x01e60000 0x10000>;
        interrupts = <47>;
        clocks = <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
                 <&ccu CLK_DRAM_DE_BE0>;
        clock-names = "ahb", "mod",
                      "ram";
        resets = <&ccu RST_DE_BE0>;

        ports {
            #address-cells = <1>;
            #size-cells = <0>;

            port@0 {
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <0>;

                endpoint@0 {
                    reg = <0>;
                    remote-endpoint = <&fe0_out_be0>;
                };

                endpoint@1 {
                    reg = <1>;
                    remote-endpoint = <&fe1_out_be0>;
                };
            };

            port@1 {
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <1>;

                endpoint@0 {
                    reg = <0>;
                    remote-endpoint = <&tcon0_in_be0>;
                };

                endpoint@1 {
                    reg = <1>;
                    remote-endpoint = <&tcon1_in_be0>;
                };
            };
        };
    };

  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    /*
     * This comes from the clock/sun8i-a23-a33-ccu.h and
     * reset/sun8i-a23-a33-ccu.h headers, but we can't include them
     * since it would trigger a bunch of warnings for redefinitions of
     * symbols with the other example.
     */

    #define CLK_BUS_DE_BE	40
    #define CLK_BUS_SAT		46
    #define CLK_DRAM_DE_BE	84
    #define CLK_DE_BE		85
    #define RST_BUS_DE_BE	21
    #define RST_BUS_SAT		27

    display-backend@1e60000 {
        compatible = "allwinner,sun8i-a33-display-backend";
        reg = <0x01e60000 0x10000>, <0x01e80000 0x1000>;
        reg-names = "be", "sat";
        interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>,
                 <&ccu CLK_DRAM_DE_BE>, <&ccu CLK_BUS_SAT>;
        clock-names = "ahb", "mod",
                      "ram", "sat";
        resets = <&ccu RST_BUS_DE_BE>, <&ccu RST_BUS_SAT>;
        reset-names = "be", "sat";

        ports {
            #address-cells = <1>;
            #size-cells = <0>;

            port@0 {
                reg = <0>;

                endpoint {
                    remote-endpoint = <&fe0_out_be0>;
                };
            };

            port@1 {
                reg = <1>;

                endpoint {
                    remote-endpoint = <&drc0_in_be0>;
                };
            };
        };
    };

...
+114 −0
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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-engine.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Allwinner A10 Display Engine Pipeline Device Tree Bindings

maintainers:
  - Chen-Yu Tsai <wens@csie.org>
  - Maxime Ripard <mripard@kernel.org>

description: |
  The display engine pipeline (and its entry point, since it can be
  either directly the backend or the frontend) is represented as an
  extra node.

  The Allwinner A10 Display pipeline is composed of several components
  that are going to be documented below:

  For all connections between components up to the TCONs in the
  display pipeline, when there are multiple components of the same
  type at the same depth, the local endpoint ID must be the same as
  the remote component's index. For example, if the remote endpoint is
  Frontend 1, then the local endpoint ID must be 1.

  Frontend 0  [0] ------- [0]  Backend 0  [0] ------- [0]  TCON 0
              [1] --   -- [1]             [1] --   -- [1]
                    \ /                         \ /
                     X                           X
                    / \                         / \
              [0] --   -- [0]             [0] --   -- [0]
  Frontend 1  [1] ------- [1]  Backend 1  [1] ------- [1]  TCON 1

  For a two pipeline system such as the one depicted above, the lines
  represent the connections between the components, while the numbers
  within the square brackets corresponds to the ID of the local endpoint.

  The same rule also applies to DE 2.0 mixer-TCON connections:

  Mixer 0  [0] ----------- [0]  TCON 0
           [1] ----   ---- [1]
                   \ /
                    X
                   / \
           [0] ----   ---- [0]
  Mixer 1  [1] ----------- [1]  TCON 1

properties:
  compatible:
    enum:
      - allwinner,sun4i-a10-display-engine
      - allwinner,sun5i-a10s-display-engine
      - allwinner,sun5i-a13-display-engine
      - allwinner,sun6i-a31-display-engine
      - allwinner,sun6i-a31s-display-engine
      - allwinner,sun7i-a20-display-engine
      - allwinner,sun8i-a23-display-engine
      - allwinner,sun8i-a33-display-engine
      - allwinner,sun8i-a83t-display-engine
      - allwinner,sun8i-h3-display-engine
      - allwinner,sun8i-r40-display-engine
      - allwinner,sun8i-v3s-display-engine
      - allwinner,sun9i-a80-display-engine
      - allwinner,sun50i-a64-display-engine
      - allwinner,sun50i-h6-display-engine

  allwinner,pipelines:
    allOf:
      - $ref: /schemas/types.yaml#/definitions/phandle-array
      - minItems: 1
        maxItems: 2
    description: |
      Available display engine frontends (DE 1.0) or mixers (DE
      2.0/3.0) available.

required:
  - compatible
  - allwinner,pipelines

additionalProperties: false

if:
  properties:
    compatible:
      contains:
        enum:
          - allwinner,sun4i-a10-display-engine
          - allwinner,sun6i-a31-display-engine
          - allwinner,sun6i-a31s-display-engine
          - allwinner,sun7i-a20-display-engine
          - allwinner,sun8i-a83t-display-engine
          - allwinner,sun8i-r40-display-engine
          - allwinner,sun9i-a80-display-engine
          - allwinner,sun50i-a64-display-engine

then:
  properties:
    allwinner,pipelines:
      minItems: 2

else:
  properties:
    allwinner,pipelines:
      maxItems: 1

examples:
  - |
      de: display-engine {
          compatible = "allwinner,sun4i-a10-display-engine";
          allwinner,pipelines = <&fe0>, <&fe1>;
      };

...
+138 −0
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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-frontend.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Allwinner A10 Display Engine Frontend Device Tree Bindings

maintainers:
  - Chen-Yu Tsai <wens@csie.org>
  - Maxime Ripard <mripard@kernel.org>

description: |
  The display engine frontend does formats conversion, scaling,
  deinterlacing and color space conversion.

properties:
  compatible:
    enum:
      - allwinner,sun4i-a10-display-frontend
      - allwinner,sun5i-a13-display-frontend
      - allwinner,sun6i-a31-display-frontend
      - allwinner,sun7i-a20-display-frontend
      - allwinner,sun8i-a23-display-frontend
      - allwinner,sun8i-a33-display-frontend
      - allwinner,sun9i-a80-display-frontend

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: The frontend interface clock
      - description: The frontend module clock
      - description: The frontend DRAM clock

  clock-names:
    items:
      - const: ahb
      - const: mod
      - const: ram

  # FIXME: This should be made required eventually once every SoC will
  # have the MBUS declared.
  interconnects:
    maxItems: 1

  # FIXME: This should be made required eventually once every SoC will
  # have the MBUS declared.
  interconnect-names:
    const: dma-mem

  resets:
    maxItems: 1

  ports:
    type: object
    description: |
      A ports node with endpoint definitions as defined in
      Documentation/devicetree/bindings/media/video-interfaces.txt.

    properties:
      "#address-cells":
        const: 1

      "#size-cells":
        const: 0

      port@0:
        type: object
        description: |
          Input endpoints of the controller.

      port@1:
        type: object
        description: |
          Output endpoints of the controller.

    required:
      - "#address-cells"
      - "#size-cells"
      - port@1

    additionalProperties: false

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - resets
  - ports

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/sun4i-a10-ccu.h>
    #include <dt-bindings/reset/sun4i-a10-ccu.h>

    fe0: display-frontend@1e00000 {
        compatible = "allwinner,sun4i-a10-display-frontend";
        reg = <0x01e00000 0x20000>;
        interrupts = <47>;
        clocks = <&ccu CLK_AHB_DE_FE0>, <&ccu CLK_DE_FE0>,
                 <&ccu CLK_DRAM_DE_FE0>;
        clock-names = "ahb", "mod",
                      "ram";
        resets = <&ccu RST_DE_FE0>;

        ports {
            #address-cells = <1>;
            #size-cells = <0>;

            fe0_out: port@1 {
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <1>;

                fe0_out_be0: endpoint@0 {
                    reg = <0>;
                    remote-endpoint = <&be0_in_fe0>;
                };

                fe0_out_be1: endpoint@1 {
                    reg = <1>;
                    remote-endpoint = <&be1_in_fe0>;
                };
            };
        };
    };


...
+183 −0
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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-hdmi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Allwinner A10 HDMI Controller Device Tree Bindings

description: |
  The HDMI Encoder supports the HDMI video and audio outputs, and does
  CEC. It is one end of the pipeline.

maintainers:
  - Chen-Yu Tsai <wens@csie.org>
  - Maxime Ripard <mripard@kernel.org>

properties:
  compatible:
    oneOf:
      - const: allwinner,sun4i-a10-hdmi
      - const: allwinner,sun5i-a10s-hdmi
      - const: allwinner,sun6i-a31-hdmi
      - items:
        - const: allwinner,sun7i-a20-hdmi
        - const: allwinner,sun5i-a10s-hdmi

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    oneOf:
      - items:
        - description: The HDMI interface clock
        - description: The HDMI module clock
        - description: The first video PLL
        - description: The second video PLL

      - items:
        - description: The HDMI interface clock
        - description: The HDMI module clock
        - description: The HDMI DDC clock
        - description: The first video PLL
        - description: The second video PLL

  clock-names:
    oneOf:
      - items:
        - const: ahb
        - const: mod
        - const: pll-0
        - const: pll-1

      - items:
        - const: ahb
        - const: mod
        - const: ddc
        - const: pll-0
        - const: pll-1

  resets:
    maxItems: 1

  dmas:
    items:
      - description: DDC Transmission DMA Channel
      - description: DDC Reception DMA Channel
      - description: Audio Transmission DMA Channel

  dma-names:
    items:
      - const: ddc-tx
      - const: ddc-rx
      - const: audio-tx

  ports:
    type: object
    description: |
      A ports node with endpoint definitions as defined in
      Documentation/devicetree/bindings/media/video-interfaces.txt.

    properties:
      "#address-cells":
        const: 1

      "#size-cells":
        const: 0

      port@0:
        type: object
        description: |
          Input endpoints of the controller.

      port@1:
        type: object
        description: |
          Output endpoints of the controller. Usually an HDMI
          connector.

    required:
      - "#address-cells"
      - "#size-cells"
      - port@0
      - port@1

    additionalProperties: false

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - dmas
  - dma-names

if:
  properties:
    compatible:
      contains:
        const: allwinner,sun6i-a31-hdmi

then:
  properties:
    clocks:
      minItems: 5

    clock-names:
      minItems: 5

  required:
    - resets

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/sun4i-a10-ccu.h>
    #include <dt-bindings/dma/sun4i-a10.h>
    #include <dt-bindings/reset/sun4i-a10-ccu.h>

    hdmi: hdmi@1c16000 {
        compatible = "allwinner,sun4i-a10-hdmi";
        reg = <0x01c16000 0x1000>;
        interrupts = <58>;
        clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>,
                 <&ccu CLK_PLL_VIDEO0_2X>,
                 <&ccu CLK_PLL_VIDEO1_2X>;
        clock-names = "ahb", "mod", "pll-0", "pll-1";
        dmas = <&dma SUN4I_DMA_NORMAL 16>,
               <&dma SUN4I_DMA_NORMAL 16>,
               <&dma SUN4I_DMA_DEDICATED 24>;
        dma-names = "ddc-tx", "ddc-rx", "audio-tx";

        ports {
            #address-cells = <1>;
            #size-cells = <0>;

            hdmi_in: port@0 {
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <0>;

                hdmi_in_tcon0: endpoint@0 {
                    reg = <0>;
                    remote-endpoint = <&tcon0_out_hdmi>;
                };

                hdmi_in_tcon1: endpoint@1 {
                    reg = <1>;
                    remote-endpoint = <&tcon1_out_hdmi>;
                };
            };

            hdmi_out: port@1 {
                reg = <1>;
            };
        };
    };

...
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