Commit 9f3ccd40 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Drop GEM context as a direct link from i915_request 



Keep the intel_context as being the primary state for i915_request, with
the GEM context a backpointer from the low level state for the rarer
cases we need client information. Our goal is to remove such references
to clients from the backend, and leave the HW submission agnostic to
client interfaces and self-contained.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Andi Shyti <andi.shyti@intel.com>
Reviewed-by: default avatarAndi Shyti <andi.shyti@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191220101230.256839-1-chris@chris-wilson.co.uk
parent d5e19353

drivers/gpu/drm/i915/gem/i915_gem_context.c

+5 −10
Original line number Diff line number Diff line
@@ -69,6 +69,7 @@ 


#include <drm/i915_drm.h>



#include "gt/intel_context.h"

#include "gt/intel_engine_heartbeat.h"

#include "gt/intel_engine_pm.h"

#include "gt/intel_engine_user.h"
@@ -423,15 +424,6 @@ static void kill_context(struct i915_gem_context *ctx) 
	struct i915_gem_engines_iter it;

	struct intel_context *ce;



	/*

	 * If we are already banned, it was due to a guilty request causing

	 * a reset and the entire context being evicted from the GPU.

	 */

	if (i915_gem_context_is_banned(ctx))

		return;



	i915_gem_context_set_banned(ctx);



	/*

	 * Map the user's engine back to the actual engines; one virtual

	 * engine will be mapped to multiple engines, and using ctx->engine[]
@@ -442,6 +434,9 @@ static void kill_context(struct i915_gem_context *ctx) 
	for_each_gem_engine(ce, __context_engines_static(ctx), it) {

		struct intel_engine_cs *engine;



		if (intel_context_set_banned(ce))

			continue;



		/*

		 * Check the current active state of this context; if we

		 * are currently executing on the GPU we need to evict
@@ -1093,7 +1088,7 @@ static void set_ppgtt_barrier(void *data) 


static int emit_ppgtt_update(struct i915_request *rq, void *data)

{

	struct i915_address_space *vm = rq->hw_context->vm;

	struct i915_address_space *vm = rq->context->vm;

	struct intel_engine_cs *engine = rq->engine;

	u32 base = engine->mmio_base;

	u32 *cs;

drivers/gpu/drm/i915/gem/i915_gem_context.h

+0 −38
Original line number Diff line number Diff line
@@ -91,26 +91,6 @@ static inline void i915_gem_context_clear_persistence(struct i915_gem_context *c 
	clear_bit(UCONTEXT_PERSISTENCE, &ctx->user_flags);

}



static inline bool i915_gem_context_is_banned(const struct i915_gem_context *ctx)

{

	return test_bit(CONTEXT_BANNED, &ctx->flags);

}



static inline void i915_gem_context_set_banned(struct i915_gem_context *ctx)

{

	set_bit(CONTEXT_BANNED, &ctx->flags);

}



static inline bool i915_gem_context_force_single_submission(const struct i915_gem_context *ctx)

{

	return test_bit(CONTEXT_FORCE_SINGLE_SUBMISSION, &ctx->flags);

}



static inline void i915_gem_context_set_force_single_submission(struct i915_gem_context *ctx)

{

	__set_bit(CONTEXT_FORCE_SINGLE_SUBMISSION, &ctx->flags);

}



static inline bool

i915_gem_context_user_engines(const struct i915_gem_context *ctx)

{
@@ -129,24 +109,6 @@ i915_gem_context_clear_user_engines(struct i915_gem_context *ctx) 
	clear_bit(CONTEXT_USER_ENGINES, &ctx->flags);

}



static inline bool

i915_gem_context_nopreempt(const struct i915_gem_context *ctx)

{

	return test_bit(CONTEXT_NOPREEMPT, &ctx->flags);

}



static inline void

i915_gem_context_set_nopreempt(struct i915_gem_context *ctx)

{

	set_bit(CONTEXT_NOPREEMPT, &ctx->flags);

}



static inline void

i915_gem_context_clear_nopreempt(struct i915_gem_context *ctx)

{

	clear_bit(CONTEXT_NOPREEMPT, &ctx->flags);

}



static inline bool i915_gem_context_is_kernel(struct i915_gem_context *ctx)

{

	return !ctx->file_priv;

drivers/gpu/drm/i915/gem/i915_gem_context_types.h

+2 −5
Original line number Diff line number Diff line
@@ -134,11 +134,8 @@ struct i915_gem_context { 
	 * @flags: small set of booleans

	 */

	unsigned long flags;

#define CONTEXT_BANNED			0

#define CONTEXT_CLOSED			1

#define CONTEXT_FORCE_SINGLE_SUBMISSION	2

#define CONTEXT_USER_ENGINES		3

#define CONTEXT_NOPREEMPT		4

#define CONTEXT_CLOSED			0

#define CONTEXT_USER_ENGINES		1



	struct mutex mutex;

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

+4 −4
Original line number Diff line number Diff line
@@ -730,9 +730,6 @@ static int eb_lookup_vmas(struct i915_execbuffer *eb) 
	unsigned int i, batch;

	int err;



	if (unlikely(i915_gem_context_is_banned(eb->gem_context)))

		return -EIO;



	INIT_LIST_HEAD(&eb->relocs);

	INIT_LIST_HEAD(&eb->unbound);
@@ -2175,7 +2172,7 @@ static int eb_submit(struct i915_execbuffer *eb) 
			return err;

	}



	if (i915_gem_context_nopreempt(eb->gem_context))

	if (intel_context_nopreempt(eb->context))

		eb->request->flags |= I915_REQUEST_NOPREEMPT;



	return 0;
@@ -2261,6 +2258,9 @@ static int __eb_pin_engine(struct i915_execbuffer *eb, struct intel_context *ce) 
	if (err)

		return err;



	if (unlikely(intel_context_is_banned(ce)))

		return -EIO;



	/*

	 * Pinning the contexts may generate requests in order to acquire

	 * GGTT space, so do this first before we reserve a seqno for

drivers/gpu/drm/i915/gt/intel_breadcrumbs.c

+2 −2
Original line number Diff line number Diff line
@@ -281,7 +281,7 @@ bool i915_request_enable_breadcrumb(struct i915_request *rq) 


	if (test_bit(I915_FENCE_FLAG_ACTIVE, &rq->fence.flags)) {

		struct intel_breadcrumbs *b = &rq->engine->breadcrumbs;

		struct intel_context *ce = rq->hw_context;

		struct intel_context *ce = rq->context;

		struct list_head *pos;



		spin_lock(&b->irq_lock);
@@ -338,7 +338,7 @@ void i915_request_cancel_breadcrumb(struct i915_request *rq) 
	 */

	spin_lock(&b->irq_lock);

	if (test_bit(I915_FENCE_FLAG_SIGNAL, &rq->fence.flags)) {

		struct intel_context *ce = rq->hw_context;

		struct intel_context *ce = rq->context;



		list_del(&rq->signal_link);

		if (list_empty(&ce->signals))

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