Blackfin pata-bf54x driver: fix compiling bug - no ata_port struct in struct ata_device any more (9f24e82d) · Commits · 戴 / test

drivers/ata/pata_bf54x.c

+3 −3

Original line number	Original line	Diff line number	Diff line
	@@ -299,7 +299,7 @@ static void bfin_set_piomode(struct ata_port ap, struct ata_device adev)
	*/		*/
	n6 = num_clocks_min(t6min, fsclk);		n6 = num_clocks_min(t6min, fsclk);
	if (mode >= 0 && mode <= 4 && n6 >= 1) {		if (mode >= 0 && mode <= 4 && n6 >= 1) {
	dev_dbg(adev->ap->dev, "set piomode: mode=%d, fsclk=%ud\n", mode, fsclk);		dev_dbg(adev->link->ap->dev, "set piomode: mode=%d, fsclk=%ud\n", mode, fsclk);
	/* calculate the timing values for register transfers. */		/* calculate the timing values for register transfers. */
	while (mode > 0 && pio_fsclk[mode] > fsclk)		while (mode > 0 && pio_fsclk[mode] > fsclk)
	mode--;		mode--;
	@@ -376,7 +376,7 @@ static void bfin_set_dmamode(struct ata_port ap, struct ata_device adev)

	mode = adev->dma_mode - XFER_UDMA_0;		mode = adev->dma_mode - XFER_UDMA_0;
	if (mode >= 0 && mode <= 5) {		if (mode >= 0 && mode <= 5) {
	dev_dbg(adev->ap->dev, "set udmamode: mode=%d\n", mode);		dev_dbg(adev->link->ap->dev, "set udmamode: mode=%d\n", mode);
	/* the most restrictive timing value is t6 and tc,		/* the most restrictive timing value is t6 and tc,
	* the DIOW - data hold. If one SCLK pulse is longer		* the DIOW - data hold. If one SCLK pulse is longer
	* than this minimum value then register		* than this minimum value then register
	@@ -433,7 +433,7 @@ static void bfin_set_dmamode(struct ata_port ap, struct ata_device adev)

	mode = adev->dma_mode - XFER_MW_DMA_0;		mode = adev->dma_mode - XFER_MW_DMA_0;
	if (mode >= 0 && mode <= 2) {		if (mode >= 0 && mode <= 2) {
	dev_dbg(adev->ap->dev, "set mdmamode: mode=%d\n", mode);		dev_dbg(adev->link->ap->dev, "set mdmamode: mode=%d\n", mode);
	/* the most restrictive timing value is tf, the DMACK to		/* the most restrictive timing value is tf, the DMACK to
	* read data released. If one SCLK pulse is longer than		* read data released. If one SCLK pulse is longer than
	* this maximum value then the MDMA mode		* this maximum value then the MDMA mode

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