Commit 9f2475fe authored by Shyam Sundar's avatar Shyam Sundar Committed by Martin K. Petersen
Browse files

scsi: qla2xxx: SAN congestion management implementation

* Firmware Initialization with SCM enabled based on NVRAM setting and
  firmware support (About Firmware).

* Enable PUREX and add support for fabric performance impact
  notification (FPIN) handling.

* Allocate a default PUREX item for each vha to handle memory allocation
  failures in ISR.

Link: https://lore.kernel.org/r/20200630102229.29660-3-njavali@marvell.com


Reviewed-by: default avatarHimanshu Madhani <himanshu.madhani@oracle.com>
Reviewed-by: default avatarJames Smart <james.smart@broadcom.com>
Signed-off-by: default avatarShyam Sundar <ssundar@marvell.com>
Signed-off-by: default avatarArun Easi <aeasi@marvell.com>
Signed-off-by: default avatarNilesh Javali <njavali@marvell.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 62e9dd17
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+3 −10
Original line number Diff line number Diff line
@@ -11,10 +11,8 @@
 * ----------------------------------------------------------------------
 * |             Level            |   Last Value Used  |     Holes	|
 * ----------------------------------------------------------------------
 * | Module Init and Probe        |       0x0193       | 0x0146         |
 * |                              |                    | 0x015b-0x0160	|
 * |                              |                    | 0x016e		|
 * | Mailbox commands             |       0x1206       | 0x11a2-0x11ff	|
 * | Module Init and Probe        |       0x0199       |                |
 * | Mailbox commands             |       0x1206       | 0x11a5-0x11ff	|
 * | Device Discovery             |       0x2134       | 0x210e-0x2116  |
 * |				  | 		       | 0x211a         |
 * |                              |                    | 0x211c-0x2128  |
@@ -26,11 +24,7 @@
 * |                              |                    | 0x3036,0x3038  |
 * |                              |                    | 0x303a		|
 * | DPC Thread                   |       0x4023       | 0x4002,0x4013  |
 * | Async Events                 |       0x5090       | 0x502b-0x502f  |
 * |				  | 		       | 0x5047         |
 * |                              |                    | 0x5084,0x5075	|
 * |                              |                    | 0x503d,0x5044  |
 * |                              |                    | 0x505f		|
 * | Async Events                 |       0x509c       |                |
 * | Timer Routines               |       0x6012       |                |
 * | User Space Interactions      |       0x70e3       | 0x7018,0x702e  |
 * |				  |		       | 0x7020,0x7024  |
@@ -2662,7 +2656,6 @@ ql_dump_regs(uint level, scsi_qla_host_t *vha, uint id)
		    "mbox[%d] %#04x\n", i, rd_reg_word(mbx_reg));
}


void
ql_dump_buffer(uint level, scsi_qla_host_t *vha, uint id, const void *buf,
	       uint size)
+49 −0
Original line number Diff line number Diff line
@@ -1055,6 +1055,7 @@ static inline bool qla2xxx_is_valid_mbs(unsigned int mbs)
#define MBA_LIP_F8		0x8016	/* Received a LIP F8. */
#define MBA_LOOP_INIT_ERR	0x8017	/* Loop Initialization Error. */
#define MBA_FABRIC_AUTH_REQ	0x801b	/* Fabric Authentication Required. */
#define MBA_CONGN_NOTI_RECV	0x801e	/* Congestion Notification Received */
#define MBA_SCSI_COMPLETION	0x8020	/* SCSI Command Complete. */
#define MBA_CTIO_COMPLETION	0x8021	/* CTIO Complete. */
#define MBA_IP_COMPLETION	0x8022	/* IP Transmit Command Complete. */
@@ -1510,6 +1511,25 @@ typedef struct {
	uint8_t  reserved_3[26];
} init_cb_t;

/* Special Features Control Block */
struct init_sf_cb {
	uint8_t	format;
	uint8_t	reserved0;
	/*
	 * BIT 15-14 = Reserved
	 * BIT_13 = SAN Congestion Management (1 - Enabled, 0 - Disabled)
	 * BIT_12 = Remote Write Optimization (1 - Enabled, 0 - Disabled)
	 * BIT 11-0 = Reserved
	 */
	uint16_t flags;
	uint8_t	reserved1[32];
	uint16_t discard_OHRB_timeout_value;
	uint16_t remote_write_opt_queue_num;
	uint8_t	reserved2[40];
	uint8_t scm_related_parameter[16];
	uint8_t reserved3[32];
};

/*
 * Get Link Status mailbox command return buffer.
 */
@@ -2183,6 +2203,8 @@ typedef struct {
	struct dsd64 rsp_dsd;
} ms_iocb_entry_t;

#define SCM_EDC_ACC_RECEIVED		BIT_6
#define SCM_RDF_ACC_RECEIVED		BIT_7

/*
 * ISP queue - Mailbox Command entry structure definition.
@@ -3852,6 +3874,12 @@ struct qla_hw_data {
		uint32_t        n2n_bigger:1;
		uint32_t	secure_adapter:1;
		uint32_t	secure_fw:1;
				/* Supported by Adapter */
		uint32_t	scm_supported_a:1;
				/* Supported by Firmware */
		uint32_t	scm_supported_f:1;
				/* Enabled in Driver */
		uint32_t	scm_enabled:1;
	} flags;

	uint16_t max_exchg;
@@ -4169,6 +4197,13 @@ struct qla_hw_data {
	int		init_cb_size;
	dma_addr_t	ex_init_cb_dma;
	struct ex_init_cb_81xx *ex_init_cb;
	dma_addr_t	sf_init_cb_dma;
	struct init_sf_cb *sf_init_cb;

	void		*scm_fpin_els_buff;
	uint64_t	scm_fpin_els_buff_size;
	bool		scm_fpin_valid;
	bool		scm_fpin_payload_size;

	void		*async_pd;
	dma_addr_t	async_pd_dma;
@@ -4231,6 +4266,12 @@ struct qla_hw_data {
#define FW_ATTR_H_NVME		BIT_10
#define FW_ATTR_H_NVME_UPDATED  BIT_14

	/* About firmware SCM support */
#define FW_ATTR_EXT0_SCM_SUPPORTED	BIT_12
	/* Brocade fabric attached */
#define FW_ATTR_EXT0_SCM_BROCADE	0x00001000
	/* Cisco fabric attached */
#define FW_ATTR_EXT0_SCM_CISCO		0x00002000
	uint16_t	fw_attributes_ext[2];
	uint32_t	fw_memory_size;
	uint32_t	fw_transfer_size;
@@ -4541,6 +4582,13 @@ struct purex_item {
	} iocb;
};

#define SCM_FLAG_RDF_REJECT		0x00
#define SCM_FLAG_RDF_COMPLETED		0x01

#define QLA_CON_PRIMITIVE_RECEIVED	0x1
#define QLA_CONGESTION_ARB_WARNING	0x1
#define QLA_CONGESTION_ARB_ALARM	0X2

/*
 * Qlogic scsi host structure
 */
@@ -4749,6 +4797,7 @@ typedef struct scsi_qla_host {
	__le16 dport_data[4];
	struct list_head gpnid_list;
	struct fab_scan scan;
	uint8_t	scm_fabric_connection_flags;

	unsigned int irq_offset;
} scsi_qla_host_t;
+5 −1
Original line number Diff line number Diff line
@@ -723,6 +723,8 @@ struct ct_entry_24xx {
	struct dsd64 dsd[2];
};

#define PURX_ELS_HEADER_SIZE	0x18

/*
 * ISP queue - PUREX IOCB entry structure definition
 */
@@ -2020,7 +2022,9 @@ struct nvram_81xx {
	 * BIT 0    = Extended BB credits for LR
	 * BIT 1    = Virtual Fabric Enable
	 * BIT 2-5  = Distance Support if BIT 0 is on
	 * BIT 6-15 = Unused
	 * BIT 6    = Prefer FCP
	 * BIT 7    = SCM Disabled if BIT is set (1)
	 * BIT 8-15 = Unused
	 */
	uint16_t enhanced_features;

+1 −0
Original line number Diff line number Diff line
@@ -127,6 +127,7 @@ int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport);
void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport);
int qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *);
void qla_rscn_replay(fc_port_t *fcport);
void qla24xx_free_purex_item(struct purex_item *item);
extern bool qla24xx_risc_firmware_invalid(uint32_t *);

/*
+7 −2
Original line number Diff line number Diff line
@@ -3749,7 +3749,7 @@ enable_82xx_npiv:
		}

		/* Enable PUREX PASSTHRU */
		if (ql2xrdpenable)
		if (ql2xrdpenable || ha->flags.scm_supported_f)
			qla25xx_set_els_cmds_supported(vha);
	} else
		goto failed;
@@ -3962,7 +3962,7 @@ qla24xx_update_fw_options(scsi_qla_host_t *vha)
			ha->fw_options[2] &= ~BIT_8;
	}

	if (ql2xrdpenable)
	if (ql2xrdpenable || ha->flags.scm_supported_f)
		ha->fw_options[1] |= ADD_FO1_ENABLE_PUREX_IOCB;

	/* Enable Async 8130/8131 events -- transceiver insertion/removal */
@@ -8519,6 +8519,11 @@ qla81xx_nvram_config(scsi_qla_host_t *vha)
		icb->node_name[0] &= 0xF0;
	}

	if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) {
		if ((nv->enhanced_features & BIT_7) == 0)
			ha->flags.scm_supported_a = 1;
	}

	/* Set host adapter parameters. */
	ha->flags.disable_risc_code_load = 0;
	ha->flags.enable_lip_reset = 0;
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