Commit 9ed45a20 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-next-5.4-2019-08-30' of git://people.freedesktop.org/~agd5f/linux into drm-next 



drm-next-5.4-2019-08-30:

amdgpu:
- Add DC support for Renoir
- Add some GPUVM hw bug workarounds
- add support for the smu11 i2c controller
- GPU reset vram lost bug fixes
- Navi1x powergating fixes
- Navi12 power fixes
- Renoir power fixes
- Misc bug fixes and cleanups

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190830212650.5055-1-alexander.deucher@amd.com
parents c7eb7c12 9c9284f9

drivers/gpu/drm/Makefile

+0 −1
Original line number Diff line number Diff line
@@ -63,7 +63,6 @@ obj-$(CONFIG_DRM_TTM) += ttm/ 
obj-$(CONFIG_DRM_SCHED)	+= scheduler/

obj-$(CONFIG_DRM_TDFX)	+= tdfx/

obj-$(CONFIG_DRM_R128)	+= r128/

obj-$(CONFIG_HSA_AMD) += amd/amdkfd/

obj-$(CONFIG_DRM_RADEON)+= radeon/

obj-$(CONFIG_DRM_AMDGPU)+= amd/amdgpu/

obj-$(CONFIG_DRM_MGA)	+= mga/

drivers/gpu/drm/amd/amdgpu/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -54,7 +54,7 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ 
	amdgpu_gtt_mgr.o amdgpu_vram_mgr.o amdgpu_virt.o amdgpu_atomfirmware.o \

	amdgpu_vf_error.o amdgpu_sched.o amdgpu_debugfs.o amdgpu_ids.o \

	amdgpu_gmc.o amdgpu_xgmi.o amdgpu_csa.o amdgpu_ras.o amdgpu_vm_cpu.o \

	amdgpu_vm_sdma.o amdgpu_discovery.o

	amdgpu_vm_sdma.o amdgpu_pmu.o amdgpu_discovery.o amdgpu_ras_eeprom.o smu_v11_0_i2c.o



amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+1 −0
Original line number Diff line number Diff line
@@ -1151,6 +1151,7 @@ int emu_soc_asic_init(struct amdgpu_device *adev); 
#define amdgpu_asic_get_pcie_usage(adev, cnt0, cnt1) ((adev)->asic_funcs->get_pcie_usage((adev), (cnt0), (cnt1)))

#define amdgpu_asic_need_reset_on_init(adev) (adev)->asic_funcs->need_reset_on_init((adev))

#define amdgpu_asic_get_pcie_replay_count(adev) ((adev)->asic_funcs->get_pcie_replay_count((adev)))

#define amdgpu_inc_vram_lost(adev) atomic_inc(&((adev)->vram_lost_counter));



/* Common functions */

bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c

+1 −0
Original line number Diff line number Diff line
@@ -574,6 +574,7 @@ static const struct amdgpu_px_quirk amdgpu_px_quirk_list[] = { 
	{ 0x1002, 0x6900, 0x1002, 0x0124, AMDGPU_PX_QUIRK_FORCE_ATPX },

	{ 0x1002, 0x6900, 0x1028, 0x0812, AMDGPU_PX_QUIRK_FORCE_ATPX },

	{ 0x1002, 0x6900, 0x1028, 0x0813, AMDGPU_PX_QUIRK_FORCE_ATPX },

	{ 0x1002, 0x699f, 0x1028, 0x0814, AMDGPU_PX_QUIRK_FORCE_ATPX },

	{ 0x1002, 0x6900, 0x1025, 0x125A, AMDGPU_PX_QUIRK_FORCE_ATPX },

	{ 0x1002, 0x6900, 0x17AA, 0x3806, AMDGPU_PX_QUIRK_FORCE_ATPX },

	{ 0, 0, 0, 0, 0 },

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+9 −8
Original line number Diff line number Diff line
@@ -2518,6 +2518,9 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type) 
	case CHIP_NAVI10:

	case CHIP_NAVI14:

	case CHIP_NAVI12:

#endif

#if defined(CONFIG_DRM_AMD_DC_DCN2_1)

	case CHIP_RENOIR:

#endif

		return amdgpu_dc != 0;

#endif
@@ -3483,7 +3486,7 @@ error: 
	amdgpu_virt_init_data_exchange(adev);

	amdgpu_virt_release_full_gpu(adev, true);

	if (!r && adev->virt.gim_feature & AMDGIM_FEATURE_GIM_FLR_VRAMLOST) {

		atomic_inc(&adev->vram_lost_counter);

		amdgpu_inc_vram_lost(adev);

		r = amdgpu_device_recover_vram(adev);

	}
@@ -3649,7 +3652,7 @@ static int amdgpu_do_asic_reset(struct amdgpu_hive_info *hive, 
				vram_lost = amdgpu_device_check_vram_lost(tmp_adev);

				if (vram_lost) {

					DRM_INFO("VRAM is lost due to GPU reset!\n");

					atomic_inc(&tmp_adev->vram_lost_counter);

					amdgpu_inc_vram_lost(tmp_adev);

				}



				r = amdgpu_gtt_mgr_recover(
@@ -3791,14 +3794,14 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev, 


	if (hive && !mutex_trylock(&hive->reset_lock)) {

		DRM_INFO("Bailing on TDR for s_job:%llx, hive: %llx as another already in progress",

			 job->base.id, hive->hive_id);

			  job ? job->base.id : -1, hive->hive_id);

		return 0;

	}



	/* Start with adev pre asic reset first for soft reset check.*/

	if (!amdgpu_device_lock_adev(adev, !hive)) {

		DRM_INFO("Bailing on TDR for s_job:%llx, as another already in progress",

					 job->base.id);

			  job ? job->base.id : -1);

		return 0;

	}
@@ -3839,7 +3842,7 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev, 
			if (!ring || !ring->sched.thread)

				continue;



			drm_sched_stop(&ring->sched, &job->base);

			drm_sched_stop(&ring->sched, job ? &job->base : NULL);

		}

	}
@@ -3864,9 +3867,7 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev, 




	/* Guilty job will be freed after this*/

	r = amdgpu_device_pre_asic_reset(adev,

					 job,

					 &need_full_reset);

	r = amdgpu_device_pre_asic_reset(adev, job, &need_full_reset);

	if (r) {

		/*TODO Should we stop ?*/

		DRM_ERROR("GPU pre asic reset failed with err, %d for drm dev, %s ",

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