dt-bindings: ARM: Mediatek: Document devicetree bindings for clock/reset controllers

Mediatek apmixedsys controller

==============================

The Mediatek apmixedsys controller provides the PLLs to the system.

Required Properties:

- compatible: Should be:

	- "mediatek,mt8135-apmixedsys"

	- "mediatek,mt8173-apmixedsys"

- #clock-cells: Must be 1

The apmixedsys controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

The available clocks are defined in dt-bindings/clock/mt*-clk.h.

Example:

apmixedsys: apmixedsys@10209000 {

	compatible = "mediatek,mt8173-apmixedsys";

	reg = <0 0x10209000 0 0x1000>;

	#clock-cells = <1>;

};

Mediatek infracfg controller

============================

The Mediatek infracfg controller provides various clocks and reset

outputs to the system.

Required Properties:

- compatible: Should be:

	- "mediatek,mt8135-infracfg", "syscon"

	- "mediatek,mt8173-infracfg", "syscon"

- #clock-cells: Must be 1

- #reset-cells: Must be 1

The infracfg controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

The available clocks are defined in dt-bindings/clock/mt*-clk.h.

Also it uses the common reset controller binding from

Documentation/devicetree/bindings/reset/reset.txt.

The available reset outputs are defined in

dt-bindings/reset-controller/mt*-resets.h

Example:

infracfg: infracfg@10001000 {

	compatible = "mediatek,mt8173-infracfg", "syscon";

	reg = <0 0x10001000 0 0x1000>;

	#clock-cells = <1>;

	#reset-cells = <1>;

};

Mediatek pericfg controller

===========================

The Mediatek pericfg controller provides various clocks and reset

outputs to the system.

Required Properties:

- compatible: Should be:

	- "mediatek,mt8135-pericfg", "syscon"

	- "mediatek,mt8173-pericfg", "syscon"

- #clock-cells: Must be 1

- #reset-cells: Must be 1

The pericfg controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

The available clocks are defined in dt-bindings/clock/mt*-clk.h.

Also it uses the common reset controller binding from

Documentation/devicetree/bindings/reset/reset.txt.

The available reset outputs are defined in

dt-bindings/reset-controller/mt*-resets.h

Example:

pericfg: pericfg@10003000 {

	compatible = "mediatek,mt8173-pericfg", "syscon";

	reg = <0 0x10003000 0 0x1000>;

	#clock-cells = <1>;

	#reset-cells = <1>;

};

Mediatek topckgen controller

============================

The Mediatek topckgen controller provides various clocks to the system.

Required Properties:

- compatible: Should be:

	- "mediatek,mt8135-topckgen"

	- "mediatek,mt8173-topckgen"

- #clock-cells: Must be 1

The topckgen controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

The available clocks are defined in dt-bindings/clock/mt*-clk.h.

Example:

topckgen: topckgen@10000000 {

	compatible = "mediatek,mt8173-topckgen";

	reg = <0 0x10000000 0 0x1000>;

	#clock-cells = <1>;

};