Commit 9ea74f7c authored Apr 13, 2017 by Piotr Luc Committed by Thomas Gleixner Apr 14, 2017

x86/mce: Enable PPIN for Knights Landing/Mill



Intel Xeon Phi processors (KNL and KNM) support PPIN as well, so add their
CPUIDs to the whitelist of supported processors.

Signed-off-by: Piotr Luc <piotr.luc@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/20170408172004.8463-1-piotr.luc@intel.com
Link: http://lkml.kernel.org/r/20170413201056.10525-1-bp@alien8.de


Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

parent 32b40a82

arch/x86/kernel/cpu/mcheck/mce_intel.c

+3 −0

Original line number	Diff line number	Diff line
		@@ -481,6 +481,9 @@ static void intel_ppin_init(struct cpuinfo_x86 *c)
		case INTEL_FAM6_BROADWELL_XEON_D:
		case INTEL_FAM6_BROADWELL_X:
		case INTEL_FAM6_SKYLAKE_X:
		case INTEL_FAM6_XEON_PHI_KNL:
		case INTEL_FAM6_XEON_PHI_KNM:

		if (rdmsrl_safe(MSR_PPIN_CTL, &val))
		return;

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