Commit 9e4d7696 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'arc-5.8-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc 

Pull ARC fixes from Vineet Gupta:

 - User build systems to pass -mcpu

 - Fix potential EFA clobber in syscall handler

 - Fix ARCompact 2 levels of interrupts build

 - Detect newer HS CPU releases

 - misc other fixes

* tag 'arc-5.8-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
  ARCv2: support loop buffer (LPB) disabling
  ARC: build: remove deprecated toggle for arc700 builds
  ARC: build: allow users to specify -mcpu
  ARCv2: boot log: detect newer/upconing HS3x/HS4x releases
  ARC: elf: use right ELF_ARCH
  ARC: [arcompact] fix bitrot with 2 levels of interrupt
  ARC: entry: fix potential EFA clobber when TIF_SYSCALL_TRACE
parents a6bc851f 10011f7d

arch/arc/Kconfig

+15 −0
Original line number Diff line number Diff line
@@ -170,6 +170,15 @@ config ARC_CPU_HS 


endchoice



config ARC_TUNE_MCPU

	string "Override default -mcpu compiler flag"

	default ""

	help

	  Override default -mcpu=xxx compiler flag (which is set depending on

	  the ISA version) with the specified value.

	  NOTE: If specified flag isn't supported by current compiler the

	  ISA default value will be used as a fallback.



config CPU_BIG_ENDIAN

	bool "Enable Big Endian Mode"

	help
@@ -465,6 +474,12 @@ config ARC_IRQ_NO_AUTOSAVE 
	  This is programmable and can be optionally disabled in which case

	  software INTERRUPT_PROLOGUE/EPILGUE do the needed work



config ARC_LPB_DISABLE

	bool "Disable loop buffer (LPB)"

	help

	  On HS cores, loop buffer (LPB) is programmable in runtime and can

	  be optionally disabled.



endif # ISA_ARCV2



endmenu   # "ARC CPU Configuration"

arch/arc/Makefile

+19 −2
Original line number Diff line number Diff line
@@ -10,8 +10,25 @@ CROSS_COMPILE := $(call cc-cross-prefix, arc-linux- arceb-linux-) 
endif



cflags-y	+= -fno-common -pipe -fno-builtin -mmedium-calls -D__linux__

cflags-$(CONFIG_ISA_ARCOMPACT)	+= -mA7

cflags-$(CONFIG_ISA_ARCV2)	+= -mcpu=hs38



tune-mcpu-def-$(CONFIG_ISA_ARCOMPACT)	:= -mcpu=arc700

tune-mcpu-def-$(CONFIG_ISA_ARCV2)	:= -mcpu=hs38



ifeq ($(CONFIG_ARC_TUNE_MCPU),"")

cflags-y				+= $(tune-mcpu-def-y)

else

tune-mcpu				:= $(shell echo $(CONFIG_ARC_TUNE_MCPU))

tune-mcpu-ok 				:= $(call cc-option-yn, $(tune-mcpu))

ifeq ($(tune-mcpu-ok),y)

cflags-y				+= $(tune-mcpu)

else

# The flag provided by 'CONFIG_ARC_TUNE_MCPU' option isn't known by this compiler

# (probably the compiler is too old). Use ISA default mcpu flag instead as a safe option.

$(warning ** WARNING ** CONFIG_ARC_TUNE_MCPU flag '$(tune-mcpu)' is unknown, fallback to '$(tune-mcpu-def-y)')

cflags-y				+= $(tune-mcpu-def-y)

endif

endif





ifdef CONFIG_ARC_CURR_IN_REG

# For a global register defintion, make sure it gets passed to every file

arch/arc/include/asm/elf.h

+1 −1
Original line number Diff line number Diff line
@@ -19,7 +19,7 @@ 
#define  R_ARC_32_PCREL		0x31



/*to set parameters in the core dumps */

#define ELF_ARCH		EM_ARCOMPACT

#define ELF_ARCH		EM_ARC_INUSE

#define ELF_CLASS		ELFCLASS32



#ifdef CONFIG_CPU_BIG_ENDIAN

arch/arc/include/asm/irqflags-compact.h

+4 −1
Original line number Diff line number Diff line
@@ -90,6 +90,9 @@ static inline void arch_local_irq_restore(unsigned long flags) 
/*

 * Unconditionally Enable IRQs

 */

#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS

extern void arch_local_irq_enable(void);

#else

static inline void arch_local_irq_enable(void)

{

	unsigned long temp;
@@ -102,7 +105,7 @@ static inline void arch_local_irq_enable(void) 
	: "n"((STATUS_E1_MASK | STATUS_E2_MASK))

	: "cc", "memory");

}



#endif



/*

 * Unconditionally Disable IRQs

arch/arc/kernel/entry.S

+5 −11
Original line number Diff line number Diff line
@@ -165,7 +165,6 @@ END(EV_Extension) 
tracesys:

	; save EFA in case tracer wants the PC of traced task

	; using ERET won't work since next-PC has already committed

	lr  r12, [efa]

	GET_CURR_TASK_FIELD_PTR   TASK_THREAD, r11

	st  r12, [r11, THREAD_FAULT_ADDR]	; thread.fault_address
@@ -208,15 +207,9 @@ tracesys_exit: 
; Breakpoint TRAP

; ---------------------------------------------

trap_with_param:



	; stop_pc info by gdb needs this info

	lr  r0, [efa]

	mov r0, r12	; EFA in case ptracer/gdb wants stop_pc

	mov r1, sp



	; Now that we have read EFA, it is safe to do "fake" rtie

	;   and get out of CPU exception mode

	FAKE_RET_FROM_EXCPN



	; Save callee regs in case gdb wants to have a look

	; SP will grow up by size of CALLEE Reg-File

	; NOTE: clobbers r12
@@ -243,6 +236,10 @@ ENTRY(EV_Trap) 


	EXCEPTION_PROLOGUE



	lr  r12, [efa]



	FAKE_RET_FROM_EXCPN



	;============ TRAP 1   :breakpoints

	; Check ECR for trap with arg (PROLOGUE ensures r10 has ECR)

	bmsk.f 0, r10, 7
@@ -250,9 +247,6 @@ ENTRY(EV_Trap) 


	;============ TRAP  (no param): syscall top level



	; First return from Exception to pure K mode (Exception/IRQs renabled)

	FAKE_RET_FROM_EXCPN



	; If syscall tracing ongoing, invoke pre-post-hooks

	GET_CURR_THR_INFO_FLAGS   r10

	btst r10, TIF_SYSCALL_TRACE

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