Commit 9e4be8d0 authored Apr 29, 2019 by Raul E Rangel Committed by Ulf Hansson May 06, 2019

mmc: core: Verify SD bus width



The SD Physical Layer Spec says the following: Since the SD Memory Card
shall support at least the two bus modes 1-bit or 4-bit width, then any SD
Card shall set at least bits 0 and 2 (SD_BUS_WIDTH="0101").

This change verifies the card has specified a bus width.

AMD SDHC Device 7806 can get into a bad state after a card disconnect
where anything transferred via the DATA lines will always result in a
zero filled buffer. Currently the driver will continue without error if
the HC is in this condition. A block device will be created, but reading
from it will result in a zero buffer. This makes it seem like the SD
device has been erased, when in actuality the data is never getting
copied from the DATA lines to the data buffer.

SCR is the first command in the SD initialization sequence that uses the
DATA lines. By checking that the response was invalid, we can abort
mounting the card.

Reviewed-by: Avri Altman <avri.altman@wdc.com>
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

parent 2eaf5a53

drivers/mmc/core/sd.c

+8 −0

Original line number	Diff line number	Diff line
		@@ -221,6 +221,14 @@ static int mmc_decode_scr(struct mmc_card *card)

		if (scr->sda_spec3)
		scr->cmds = UNSTUFF_BITS(resp, 32, 2);

		/* SD Spec says: any SD Card shall set at least bits 0 and 2 */
		if (!(scr->bus_widths & SD_SCR_BUS_WIDTH_1) \|\|
		!(scr->bus_widths & SD_SCR_BUS_WIDTH_4)) {
		pr_err("%s: invalid bus width\n", mmc_hostname(card->host));
		return -EINVAL;
		}

		return 0;
		}

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