arm64: KVM: pmu: Fix AArch32 cycle counter access (9e3f7a29) · Commits · 戴 / test

We're missing the handling code for the cycle counter accessed from a 32bit guest, leading to unexpected results. Cc: stable@vger.kernel.org # 4.6+ Signed-off-by:

Wei Huang <wei@redhat.com> Signed-off-by:

Marc Zyngier <marc.zyngier@arm.com>

arch/arm64/kvm/sys_regs.c

+8 −2

Original line number	Diff line number	Diff line
		@@ -597,8 +597,14 @@ static bool access_pmu_evcntr(struct kvm_vcpu *vcpu,

		idx = ARMV8_PMU_CYCLE_IDX;
		} else {
		BUG();
		return false;
		}
		} else if (r->CRn == 0 && r->CRm == 9) {
		/* PMCCNTR */
		if (pmu_access_event_counter_el0_disabled(vcpu))
		return false;

		idx = ARMV8_PMU_CYCLE_IDX;
		} else if (r->CRn == 14 && (r->CRm & 12) == 8) {
		/* PMEVCNTRn_EL0 */
		if (pmu_access_event_counter_el0_disabled(vcpu))
		@@ -606,7 +612,7 @@ static bool access_pmu_evcntr(struct kvm_vcpu *vcpu,

		idx = ((r->CRm & 3) << 3) \| (r->Op2 & 7);
		} else {
		BUG();
		return false;
		}

		if (!pmu_counter_idx_valid(vcpu, idx))

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