Commit 9e31905f authored by Avi Kivity's avatar Avi Kivity
Browse files

Merge remote-tracking branch 'tip/perf/core' into kvm-updates/3.3 



* tip/perf/core: (66 commits)
  perf, x86: Expose perf capability to other modules
  perf, x86: Implement arch event mask as quirk
  x86, perf: Disable non available architectural events
  jump_label: Provide jump_label_key initializers
  jump_label, x86: Fix section mismatch
  perf, core: Rate limit perf_sched_events jump_label patching
  perf: Fix enable_on_exec for sibling events
  perf: Remove superfluous arguments
  perf, x86: Prefer fixed-purpose counters when scheduling
  perf, x86: Fix event scheduler for constraints with overlapping counters
  perf, x86: Implement event scheduler helper functions
  perf: Avoid a useless pmu_disable() in the perf-tick
  x86/tools: Add decoded instruction dump mode
  x86: Update instruction decoder to support new AVX formats
  x86/tools: Fix insn_sanity message outputs
  x86/tools: Fix instruction decoder message output
  x86: Fix instruction decoder to handle grouped AVX instructions
  x86/tools: Fix Makefile to build all test tools
  perf test: Soft errors shouldn't stop the "Validate PERF_RECORD_" test
  perf test: Validate PERF_RECORD_ events and perf_sample fields
  ...

Signed-off-by: default avatarAvi Kivity <avi@redhat.com>

* commit 'b3d9468a': (66 commits)
  perf, x86: Expose perf capability to other modules
  perf, x86: Implement arch event mask as quirk
  x86, perf: Disable non available architectural events
  jump_label: Provide jump_label_key initializers
  jump_label, x86: Fix section mismatch
  perf, core: Rate limit perf_sched_events jump_label patching
  perf: Fix enable_on_exec for sibling events
  perf: Remove superfluous arguments
  perf, x86: Prefer fixed-purpose counters when scheduling
  perf, x86: Fix event scheduler for constraints with overlapping counters
  perf, x86: Implement event scheduler helper functions
  perf: Avoid a useless pmu_disable() in the perf-tick
  x86/tools: Add decoded instruction dump mode
  x86: Update instruction decoder to support new AVX formats
  x86/tools: Fix insn_sanity message outputs
  x86/tools: Fix instruction decoder message output
  x86: Fix instruction decoder to handle grouped AVX instructions
  x86/tools: Fix Makefile to build all test tools
  perf test: Soft errors shouldn't stop the "Validate PERF_RECORD_" test
  perf test: Validate PERF_RECORD_ events and perf_sample fields
  ...
parents ff5c2c03 b3d9468a

Documentation/kernel-parameters.txt

+3 −0
Original line number Diff line number Diff line
@@ -1882,6 +1882,9 @@ bytes respectively. Such letter suffixes can also be entirely omitted. 
			arch_perfmon: [X86] Force use of architectural

				perfmon on Intel CPUs instead of the

				CPU specific event set.

			timer: [X86] Force use of architectural NMI

				timer mode (see also oprofile.timer

				for generic hr timer mode)



	oops=panic	Always panic on oopses. Default is to just kill the

			process, but there is a small probability of

Documentation/trace/events.txt

+0 −2
Original line number Diff line number Diff line
@@ -191,8 +191,6 @@ And for string fields they are: 


Currently, only exact string matches are supported.



Currently, the maximum number of predicates in a filter is 16.



5.2 Setting filters

-------------------

arch/Kconfig

+4 −0
Original line number Diff line number Diff line
@@ -30,6 +30,10 @@ config OPROFILE_EVENT_MULTIPLEX 
config HAVE_OPROFILE

	bool



config OPROFILE_NMI_TIMER

	def_bool y

	depends on PERF_EVENTS && HAVE_PERF_EVENTS_NMI



config KPROBES

	bool "Kprobes"

	depends on MODULES

arch/x86/include/asm/insn.h

+7 −0
Original line number Diff line number Diff line
@@ -137,6 +137,13 @@ static inline int insn_is_avx(struct insn *insn) 
	return (insn->vex_prefix.value != 0);

}



/* Ensure this instruction is decoded completely */

static inline int insn_complete(struct insn *insn)

{

	return insn->opcode.got && insn->modrm.got && insn->sib.got &&

		insn->displacement.got && insn->immediate.got;

}



static inline insn_byte_t insn_vex_m_bits(struct insn *insn)

{

	if (insn->vex_prefix.nbytes == 2)	/* 2 bytes VEX */

arch/x86/include/asm/perf_event.h

+29 −0
Original line number Diff line number Diff line
@@ -57,6 +57,7 @@ 
		(1 << (ARCH_PERFMON_UNHALTED_CORE_CYCLES_INDEX))



#define ARCH_PERFMON_BRANCH_MISSES_RETIRED		6

#define ARCH_PERFMON_EVENTS_COUNT			7



/*

 * Intel "Architectural Performance Monitoring" CPUID
@@ -72,6 +73,19 @@ union cpuid10_eax { 
	unsigned int full;

};



union cpuid10_ebx {

	struct {

		unsigned int no_unhalted_core_cycles:1;

		unsigned int no_instructions_retired:1;

		unsigned int no_unhalted_reference_cycles:1;

		unsigned int no_llc_reference:1;

		unsigned int no_llc_misses:1;

		unsigned int no_branch_instruction_retired:1;

		unsigned int no_branch_misses_retired:1;

	} split;

	unsigned int full;

};



union cpuid10_edx {

	struct {

		unsigned int num_counters_fixed:5;
@@ -81,6 +95,15 @@ union cpuid10_edx { 
	unsigned int full;

};



struct x86_pmu_capability {

	int		version;

	int		num_counters_gp;

	int		num_counters_fixed;

	int		bit_width_gp;

	int		bit_width_fixed;

	unsigned int	events_mask;

	int		events_mask_len;

};



/*

 * Fixed-purpose performance events:
@@ -202,6 +225,7 @@ struct perf_guest_switch_msr { 
};



extern struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr);

extern void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap);

#else

static inline perf_guest_switch_msr *perf_guest_get_msrs(int *nr)

{
@@ -209,6 +233,11 @@ static inline perf_guest_switch_msr *perf_guest_get_msrs(int *nr) 
	return NULL;

}



static inline void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap)

{

	memset(cap, 0, sizeof(*cap));

}



static inline void perf_events_lapic_init(void)	{ }

#endif

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