dmaengine: stm32-dma: properly mask irq bits (9df3bd55) · Commits · 戴 / test

A single register of the controller holds the information for four dma channels. The functions stm32_dma_irq_status() don't mask the relevant bits after the shift, thus adjacent channel's status is also reported in the returned value. Fixed by masking the value before returning it. Similarly, the function stm32_dma_irq_clear() don't mask the input value before shifting it, thus an incorrect input value could disable the interrupts of adjacent channels. Fixed by masking the input value before using it. Signed-off-by:

Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by:

Antonio Borneo <borneo.antonio@gmail.com> Signed-off-by:

Vinod Koul <vinod.koul@intel.com>

drivers/dma/stm32-dma.c

+6 −1

Original line number	Diff line number	Diff line
		@@ -38,6 +38,10 @@
		#define STM32_DMA_TEI BIT(3) /* Transfer Error Interrupt */
		#define STM32_DMA_DMEI BIT(2) /* Direct Mode Error Interrupt */
		#define STM32_DMA_FEI BIT(0) /* FIFO Error Interrupt */
		#define STM32_DMA_MASKI (STM32_DMA_TCI \
		\| STM32_DMA_TEI \
		\| STM32_DMA_DMEI \
		\| STM32_DMA_FEI)

		/* DMA Stream x Configuration Register */
		#define STM32_DMA_SCR(x) (0x0010 + 0x18 * (x)) /* x = 0..7 */
		@@ -405,7 +409,7 @@ static u32 stm32_dma_irq_status(struct stm32_dma_chan *chan)

		flags = dma_isr >> (((chan->id & 2) << 3) \| ((chan->id & 1) * 6));

		return flags;
		return flags & STM32_DMA_MASKI;
		}

		static void stm32_dma_irq_clear(struct stm32_dma_chan *chan, u32 flags)
		@@ -420,6 +424,7 @@ static void stm32_dma_irq_clear(struct stm32_dma_chan *chan, u32 flags)
		* If (ch % 4) is 2 or 3, left shift the mask by 16 bits.
		* If (ch % 4) is 1 or 3, additionally left shift the mask by 6 bits.
		*/
		flags &= STM32_DMA_MASKI;
		dma_ifcr = flags << (((chan->id & 2) << 3) \| ((chan->id & 1) * 6));

		if (chan->id & 4)

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