Commit 9dc24a2d authored by Daniel Thompson's avatar Daniel Thompson Committed by Maxime Coquelin
Browse files

ARM: dts: stm32f429: Adopt STM32F4 clock driver 



New bindings and driver have been created for STM32F42xxx series parts.
This patch integrates these changes.

Note: Earlier device tree blobs (those without st,stm32f42xxx
      compatibles for the rcc) could still be used to boot basic
      systems. Such systems rely on the bootloader to configure the
      clock gates for vital periperhals.

Signed-off-by: default avatarDaniel Thompson <daniel.thompson@linaro.org>
Reviewed-by: default avatarMaxime Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: default avatarMaxime Coquelin <mcoquelin.stm32@gmail.com>
parent d770e558

arch/arm/boot/dts/stm32f429-disco.dts

+4 −0
Original line number Diff line number Diff line
@@ -66,6 +66,10 @@ 
	};

};



&clk_hse {

	clock-frequency = <8000000>;

};



&usart1 {

	status = "okay";

};

arch/arm/boot/dts/stm32f429.dtsi

+24 −55
Original line number Diff line number Diff line
@@ -49,48 +49,10 @@ 


/ {

	clocks {

		clk_sysclk: clk-sysclk {

		clk_hse: clk-hse {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <180000000>;

		};



		clk_hclk: clk-hclk {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <180000000>;

		};



		clk_pclk1: clk-pclk1 {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <45000000>;

		};



		clk_pclk2: clk-pclk2 {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <90000000>;

		};



		clk_pmtr1: clk-pmtr1 {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <90000000>;

		};



		clk_pmtr2: clk-pmtr2 {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <180000000>;

		};



		clk_systick: clk-systick {

			compatible = "fixed-factor-clock";

			clocks = <&clk_hclk>;

			#clock-cells = <0>;

			clock-div = <8>;

			clock-mult = <1>;

			clock-frequency = <0>;

		};

	};
@@ -99,7 +61,7 @@ 
			compatible = "st,stm32-timer";

			reg = <0x40000000 0x400>;

			interrupts = <28>;

			clocks = <&clk_pmtr1>;

			clocks = <&rcc 0 128>;

			status = "disabled";

		};
@@ -107,7 +69,7 @@ 
			compatible = "st,stm32-timer";

			reg = <0x40000400 0x400>;

			interrupts = <29>;

			clocks = <&clk_pmtr1>;

			clocks = <&rcc 0 129>;

			status = "disabled";

		};
@@ -115,7 +77,7 @@ 
			compatible = "st,stm32-timer";

			reg = <0x40000800 0x400>;

			interrupts = <30>;

			clocks = <&clk_pmtr1>;

			clocks = <&rcc 0 130>;

			status = "disabled";

		};
@@ -123,14 +85,14 @@ 
			compatible = "st,stm32-timer";

			reg = <0x40000c00 0x400>;

			interrupts = <50>;

			clocks = <&clk_pmtr1>;

			clocks = <&rcc 0 131>;

		};



		timer6: timer@40001000 {

			compatible = "st,stm32-timer";

			reg = <0x40001000 0x400>;

			interrupts = <54>;

			clocks = <&clk_pmtr1>;

			clocks = <&rcc 0 132>;

			status = "disabled";

		};
@@ -138,7 +100,7 @@ 
			compatible = "st,stm32-timer";

			reg = <0x40001400 0x400>;

			interrupts = <55>;

			clocks = <&clk_pmtr1>;

			clocks = <&rcc 0 133>;

			status = "disabled";

		};
@@ -146,7 +108,7 @@ 
			compatible = "st,stm32-usart", "st,stm32-uart";

			reg = <0x40004400 0x400>;

			interrupts = <38>;

			clocks = <&clk_pclk1>;

			clocks =  <&rcc 0 145>;

			status = "disabled";

		};
@@ -154,7 +116,7 @@ 
			compatible = "st,stm32-usart", "st,stm32-uart";

			reg = <0x40004800 0x400>;

			interrupts = <39>;

			clocks = <&clk_pclk1>;

			clocks = <&rcc 0 146>;

			status = "disabled";

		};
@@ -162,7 +124,7 @@ 
			compatible = "st,stm32-uart";

			reg = <0x40004c00 0x400>;

			interrupts = <52>;

			clocks = <&clk_pclk1>;

			clocks = <&rcc 0 147>;

			status = "disabled";

		};
@@ -170,7 +132,7 @@ 
			compatible = "st,stm32-uart";

			reg = <0x40005000 0x400>;

			interrupts = <53>;

			clocks = <&clk_pclk1>;

			clocks = <&rcc 0 148>;

			status = "disabled";

		};
@@ -178,7 +140,7 @@ 
			compatible = "st,stm32-usart", "st,stm32-uart";

			reg = <0x40007800 0x400>;

			interrupts = <82>;

			clocks = <&clk_pclk1>;

			clocks = <&rcc 0 158>;

			status = "disabled";

		};
@@ -186,7 +148,7 @@ 
			compatible = "st,stm32-usart", "st,stm32-uart";

			reg = <0x40007c00 0x400>;

			interrupts = <83>;

			clocks = <&clk_pclk1>;

			clocks = <&rcc 0 159>;

			status = "disabled";

		};
@@ -194,7 +156,7 @@ 
			compatible = "st,stm32-usart", "st,stm32-uart";

			reg = <0x40011000 0x400>;

			interrupts = <37>;

			clocks = <&clk_pclk2>;

			clocks = <&rcc 0 164>;

			status = "disabled";

		};
@@ -202,13 +164,20 @@ 
			compatible = "st,stm32-usart", "st,stm32-uart";

			reg = <0x40011400 0x400>;

			interrupts = <71>;

			clocks = <&clk_pclk2>;

			clocks = <&rcc 0 165>;

			status = "disabled";

		};



		rcc: rcc@40023810 {

			#clock-cells = <2>;

			compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";

			reg = <0x40023800 0x400>;

			clocks = <&clk_hse>;

		};

	};

};



&systick {

	clocks = <&clk_systick>;

	clocks = <&rcc 1 0>;

	status = "okay";

};

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