Commit 9dabfdd8 authored by Daniel Mack's avatar Daniel Mack Committed by Linus Walleij
Browse files

gpio: pxa: disable pinctrl calls for PXA3xx 



The pxa3xx driver uses the pinctrl-single driver since a while which
does not implement a .gpio_set_direction() callback. The pinmux core
will simply return 0 in this case, and the pxa3xx gpio driver hence
believes the pinctrl driver did its job and returns as well.

This effectively makes pxa_gpio_direction_{input,output} no-ops.

To fix this, do not call into the pinctrl subsystem for the PXA3xx
platform for now. We can revert this once the pinctrl-single driver
learned to support setting pin directions.

Signed-off-by: default avatarDaniel Mack <daniel@zonque.org>
Acked-by: default avatarRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 4bf4eed4

drivers/gpio/gpio-pxa.c

+27 −8
Original line number Original line Diff line number Diff line
@@ -241,6 +241,17 @@ int pxa_irq_to_gpio(int irq) 
	return irq_gpio0;

	return irq_gpio0;

}

}





static bool pxa_gpio_has_pinctrl(void)

{

	switch (gpio_type) {

	case PXA3XX_GPIO:

		return false;



	default:

		return true;

	}

}



static int pxa_gpio_to_irq(struct gpio_chip *chip, unsigned offset)

static int pxa_gpio_to_irq(struct gpio_chip *chip, unsigned offset)

{

{

	struct pxa_gpio_chip *pchip = chip_to_pxachip(chip);

	struct pxa_gpio_chip *pchip = chip_to_pxachip(chip);
@@ -255,9 +266,11 @@ static int pxa_gpio_direction_input(struct gpio_chip *chip, unsigned offset) 
	unsigned long flags;

	unsigned long flags;

	int ret;

	int ret;





	if (pxa_gpio_has_pinctrl()) {

		ret = pinctrl_gpio_direction_input(chip->base + offset);

		ret = pinctrl_gpio_direction_input(chip->base + offset);

		if (!ret)

		if (!ret)

			return 0;

			return 0;

	}





	spin_lock_irqsave(&gpio_lock, flags);

	spin_lock_irqsave(&gpio_lock, flags);
@@ -282,9 +295,11 @@ static int pxa_gpio_direction_output(struct gpio_chip *chip, 




	writel_relaxed(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET));

	writel_relaxed(mask, base + (value ? GPSR_OFFSET : GPCR_OFFSET));





	if (pxa_gpio_has_pinctrl()) {

		ret = pinctrl_gpio_direction_output(chip->base + offset);

		ret = pinctrl_gpio_direction_output(chip->base + offset);

		if (ret)

		if (ret)

			return ret;

			return ret;

	}





	spin_lock_irqsave(&gpio_lock, flags);

	spin_lock_irqsave(&gpio_lock, flags);
@@ -348,8 +363,12 @@ static int pxa_init_gpio_chip(struct pxa_gpio_chip *pchip, int ngpio, 
	pchip->chip.set = pxa_gpio_set;

	pchip->chip.set = pxa_gpio_set;

	pchip->chip.to_irq = pxa_gpio_to_irq;

	pchip->chip.to_irq = pxa_gpio_to_irq;

	pchip->chip.ngpio = ngpio;

	pchip->chip.ngpio = ngpio;



	if (pxa_gpio_has_pinctrl()) {

		pchip->chip.request = gpiochip_generic_request;

		pchip->chip.request = gpiochip_generic_request;

		pchip->chip.free = gpiochip_generic_free;

		pchip->chip.free = gpiochip_generic_free;

	}



#ifdef CONFIG_OF_GPIO

#ifdef CONFIG_OF_GPIO

	pchip->chip.of_node = np;

	pchip->chip.of_node = np;

	pchip->chip.of_xlate = pxa_gpio_of_xlate;

	pchip->chip.of_xlate = pxa_gpio_of_xlate;

CRA Git | Maintained and supported by SUSTech CRA and CCSE