Commit 9da5bb24 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'dmaengine-fix-5.3-rc5' of git://git.infradead.org/users/vkoul/slave-dma 

Pull dmaengine fixes from Vinod Koul:
 "Fixes in dmaengine drivers for:

   - dw-edma: endianess, _iomem type and stack usages

   - ste_dma40: unneeded variable and null-pointer dereference

   - tegra210-adma: unused function

   - omap-dma: off-by-one fix"

* tag 'dmaengine-fix-5.3-rc5' of git://git.infradead.org/users/vkoul/slave-dma:
  omap-dma/omap_vout_vrfb: fix off-by-one fi value
  dmaengine: stm32-mdma: Fix a possible null-pointer dereference in stm32_mdma_irq_handler()
  dmaengine: tegra210-adma: Fix unused function warnings
  dmaengine: ste_dma40: fix unneeded variable warning
  dmaengine: dw-edma: fix endianess confusion
  dmaengine: dw-edma: fix __iomem type confusion
  dmaengine: dw-edma: fix unnecessary stack usage
parents cfa0bb2a d555c343

drivers/dma/dw-edma/dw-edma-core.h

+1 −1
Original line number Diff line number Diff line
@@ -50,7 +50,7 @@ struct dw_edma_burst { 


struct dw_edma_region {

	phys_addr_t			paddr;

	dma_addr_t			vaddr;

	void				__iomem *vaddr;

	size_t				sz;

};

drivers/dma/dw-edma/dw-edma-pcie.c

+9 −9
Original line number Diff line number Diff line
@@ -130,19 +130,19 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev, 
	chip->id = pdev->devfn;

	chip->irq = pdev->irq;



	dw->rg_region.vaddr = (dma_addr_t)pcim_iomap_table(pdev)[pdata->rg_bar];

	dw->rg_region.vaddr = pcim_iomap_table(pdev)[pdata->rg_bar];

	dw->rg_region.vaddr += pdata->rg_off;

	dw->rg_region.paddr = pdev->resource[pdata->rg_bar].start;

	dw->rg_region.paddr += pdata->rg_off;

	dw->rg_region.sz = pdata->rg_sz;



	dw->ll_region.vaddr = (dma_addr_t)pcim_iomap_table(pdev)[pdata->ll_bar];

	dw->ll_region.vaddr = pcim_iomap_table(pdev)[pdata->ll_bar];

	dw->ll_region.vaddr += pdata->ll_off;

	dw->ll_region.paddr = pdev->resource[pdata->ll_bar].start;

	dw->ll_region.paddr += pdata->ll_off;

	dw->ll_region.sz = pdata->ll_sz;



	dw->dt_region.vaddr = (dma_addr_t)pcim_iomap_table(pdev)[pdata->dt_bar];

	dw->dt_region.vaddr = pcim_iomap_table(pdev)[pdata->dt_bar];

	dw->dt_region.vaddr += pdata->dt_off;

	dw->dt_region.paddr = pdev->resource[pdata->dt_bar].start;

	dw->dt_region.paddr += pdata->dt_off;
@@ -158,17 +158,17 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev, 
	pci_dbg(pdev, "Mode:\t%s\n",

		dw->mode == EDMA_MODE_LEGACY ? "Legacy" : "Unroll");



	pci_dbg(pdev, "Registers:\tBAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%pa, p=%pa)\n",

	pci_dbg(pdev, "Registers:\tBAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%p, p=%pa)\n",

		pdata->rg_bar, pdata->rg_off, pdata->rg_sz,

		&dw->rg_region.vaddr, &dw->rg_region.paddr);

		dw->rg_region.vaddr, &dw->rg_region.paddr);



	pci_dbg(pdev, "L. List:\tBAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%pa, p=%pa)\n",

	pci_dbg(pdev, "L. List:\tBAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%p, p=%pa)\n",

		pdata->ll_bar, pdata->ll_off, pdata->ll_sz,

		&dw->ll_region.vaddr, &dw->ll_region.paddr);

		dw->ll_region.vaddr, &dw->ll_region.paddr);



	pci_dbg(pdev, "Data:\tBAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%pa, p=%pa)\n",

	pci_dbg(pdev, "Data:\tBAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%p, p=%pa)\n",

		pdata->dt_bar, pdata->dt_off, pdata->dt_sz,

		&dw->dt_region.vaddr, &dw->dt_region.paddr);

		dw->dt_region.vaddr, &dw->dt_region.paddr);



	pci_dbg(pdev, "Nr. IRQs:\t%u\n", dw->nr_irqs);

drivers/dma/dw-edma/dw-edma-v0-core.c

+15 −19
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ enum dw_edma_control { 


static inline struct dw_edma_v0_regs __iomem *__dw_regs(struct dw_edma *dw)

{

	return (struct dw_edma_v0_regs __iomem *)dw->rg_region.vaddr;

	return dw->rg_region.vaddr;

}



#define SET(dw, name, value)				\
@@ -192,13 +192,12 @@ u32 dw_edma_v0_core_status_abort_int(struct dw_edma *dw, enum dw_edma_dir dir) 
static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk)

{

	struct dw_edma_burst *child;

	struct dw_edma_v0_lli *lli;

	struct dw_edma_v0_llp *llp;

	struct dw_edma_v0_lli __iomem *lli;

	struct dw_edma_v0_llp __iomem *llp;

	u32 control = 0, i = 0;

	u64 sar, dar, addr;

	int j;



	lli = (struct dw_edma_v0_lli *)chunk->ll_region.vaddr;

	lli = chunk->ll_region.vaddr;



	if (chunk->cb)

		control = DW_EDMA_V0_CB;
@@ -214,17 +213,15 @@ static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk) 
		/* Transfer size */

		SET_LL(&lli[i].transfer_size, child->sz);

		/* SAR - low, high */

		sar = cpu_to_le64(child->sar);

		SET_LL(&lli[i].sar_low, lower_32_bits(sar));

		SET_LL(&lli[i].sar_high, upper_32_bits(sar));

		SET_LL(&lli[i].sar_low, lower_32_bits(child->sar));

		SET_LL(&lli[i].sar_high, upper_32_bits(child->sar));

		/* DAR - low, high */

		dar = cpu_to_le64(child->dar);

		SET_LL(&lli[i].dar_low, lower_32_bits(dar));

		SET_LL(&lli[i].dar_high, upper_32_bits(dar));

		SET_LL(&lli[i].dar_low, lower_32_bits(child->dar));

		SET_LL(&lli[i].dar_high, upper_32_bits(child->dar));

		i++;

	}



	llp = (struct dw_edma_v0_llp *)&lli[i];

	llp = (void __iomem *)&lli[i];

	control = DW_EDMA_V0_LLP | DW_EDMA_V0_TCB;

	if (!chunk->cb)

		control |= DW_EDMA_V0_CB;
@@ -232,9 +229,8 @@ static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk) 
	/* Channel control */

	SET_LL(&llp->control, control);

	/* Linked list  - low, high */

	addr = cpu_to_le64(chunk->ll_region.paddr);

	SET_LL(&llp->llp_low, lower_32_bits(addr));

	SET_LL(&llp->llp_high, upper_32_bits(addr));

	SET_LL(&llp->llp_low, lower_32_bits(chunk->ll_region.paddr));

	SET_LL(&llp->llp_high, upper_32_bits(chunk->ll_region.paddr));

}



void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first)
@@ -242,7 +238,6 @@ void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first) 
	struct dw_edma_chan *chan = chunk->chan;

	struct dw_edma *dw = chan->chip->dw;

	u32 tmp;

	u64 llp;



	dw_edma_v0_core_write_chunk(chunk);
@@ -262,9 +257,10 @@ void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first) 
		SET_CH(dw, chan->dir, chan->id, ch_control1,

		       (DW_EDMA_V0_CCS | DW_EDMA_V0_LLE));

		/* Linked list - low, high */

		llp = cpu_to_le64(chunk->ll_region.paddr);

		SET_CH(dw, chan->dir, chan->id, llp_low, lower_32_bits(llp));

		SET_CH(dw, chan->dir, chan->id, llp_high, upper_32_bits(llp));

		SET_CH(dw, chan->dir, chan->id, llp_low,

		       lower_32_bits(chunk->ll_region.paddr));

		SET_CH(dw, chan->dir, chan->id, llp_high,

		       upper_32_bits(chunk->ll_region.paddr));

	}

	/* Doorbell */

	SET_RW(dw, chan->dir, doorbell,

drivers/dma/dw-edma/dw-edma-v0-debugfs.c

+15 −14
Original line number Diff line number Diff line
@@ -14,7 +14,7 @@ 
#include "dw-edma-core.h"



#define REGS_ADDR(name) \

	((dma_addr_t *)&regs->name)

	((void __force *)&regs->name)

#define REGISTER(name) \

	{ #name, REGS_ADDR(name) }
@@ -40,36 +40,37 @@ 


static struct dentry				*base_dir;

static struct dw_edma				*dw;

static struct dw_edma_v0_regs			*regs;

static struct dw_edma_v0_regs			__iomem *regs;



static struct {

	void					*start;

	void					*end;

	void					__iomem *start;

	void					__iomem *end;

} lim[2][EDMA_V0_MAX_NR_CH];



struct debugfs_entries {

	char					name[24];

	const char				*name;

	dma_addr_t				*reg;

};



static int dw_edma_debugfs_u32_get(void *data, u64 *val)

{

	void __iomem *reg = (void __force __iomem *)data;

	if (dw->mode == EDMA_MODE_LEGACY &&

	    data >= (void *)&regs->type.legacy.ch) {

		void *ptr = (void *)&regs->type.legacy.ch;

	    reg >= (void __iomem *)&regs->type.legacy.ch) {

		void __iomem *ptr = &regs->type.legacy.ch;

		u32 viewport_sel = 0;

		unsigned long flags;

		u16 ch;



		for (ch = 0; ch < dw->wr_ch_cnt; ch++)

			if (lim[0][ch].start >= data && data < lim[0][ch].end) {

				ptr += (data - lim[0][ch].start);

			if (lim[0][ch].start >= reg && reg < lim[0][ch].end) {

				ptr += (reg - lim[0][ch].start);

				goto legacy_sel_wr;

			}



		for (ch = 0; ch < dw->rd_ch_cnt; ch++)

			if (lim[1][ch].start >= data && data < lim[1][ch].end) {

				ptr += (data - lim[1][ch].start);

			if (lim[1][ch].start >= reg && reg < lim[1][ch].end) {

				ptr += (reg - lim[1][ch].start);

				goto legacy_sel_rd;

			}
@@ -86,7 +87,7 @@ legacy_sel_wr: 


		raw_spin_unlock_irqrestore(&dw->lock, flags);

	} else {

		*val = readl(data);

		*val = readl(reg);

	}



	return 0;
@@ -105,7 +106,7 @@ static void dw_edma_debugfs_create_x32(const struct debugfs_entries entries[], 
	}

}



static void dw_edma_debugfs_regs_ch(struct dw_edma_v0_ch_regs *regs,

static void dw_edma_debugfs_regs_ch(struct dw_edma_v0_ch_regs __iomem *regs,

				    struct dentry *dir)

{

	int nr_entries;
@@ -288,7 +289,7 @@ void dw_edma_v0_debugfs_on(struct dw_edma_chip *chip) 
	if (!dw)

		return;



	regs = (struct dw_edma_v0_regs *)dw->rg_region.vaddr;

	regs = dw->rg_region.vaddr;

	if (!regs)

		return;

drivers/dma/ste_dma40.c

+2 −2
Original line number Diff line number Diff line
@@ -142,7 +142,7 @@ enum d40_events { 
 * when the DMA hw is powered off.

 * TODO: Add save/restore of D40_DREG_GCC on dma40 v3 or later, if that works.

 */

static u32 d40_backup_regs[] = {

static __maybe_unused u32 d40_backup_regs[] = {

	D40_DREG_LCPA,

	D40_DREG_LCLA,

	D40_DREG_PRMSE,
@@ -211,7 +211,7 @@ static u32 d40_backup_regs_v4b[] = { 


#define BACKUP_REGS_SZ_V4B ARRAY_SIZE(d40_backup_regs_v4b)



static u32 d40_backup_regs_chan[] = {

static __maybe_unused u32 d40_backup_regs_chan[] = {

	D40_CHAN_REG_SSCFG,

	D40_CHAN_REG_SSELT,

	D40_CHAN_REG_SSPTR,

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