mmc: tegra: Set calibration pad voltage reference (9d548f11) · Commits · 戴 / test

drivers/mmc/host/sdhci-tegra.c

+33 −23

Original line number	Diff line number	Diff line
		@@ -51,6 +51,10 @@
		#define SDHCI_AUTO_CAL_START BIT(31)
		#define SDHCI_AUTO_CAL_ENABLE BIT(29)

		#define SDHCI_TEGRA_SDMEM_COMP_PADCTRL 0x1e0
		#define SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_MASK 0x0000000f
		#define SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_VAL 0x7

		#define SDHCI_TEGRA_AUTO_CAL_STATUS 0x1ec
		#define SDHCI_TEGRA_AUTO_CAL_ACTIVE BIT(31)

		@@ -187,7 +191,7 @@ static void tegra_sdhci_reset(struct sdhci_host *host, u8 mask)
		struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
		struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);
		const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;
		u32 misc_ctrl, clk_ctrl;
		u32 misc_ctrl, clk_ctrl, pad_ctrl;

		sdhci_reset(host, mask);

		@@ -222,8 +226,14 @@ static void tegra_sdhci_reset(struct sdhci_host *host, u8 mask)
		sdhci_writel(host, misc_ctrl, SDHCI_TEGRA_VENDOR_MISC_CTRL);
		sdhci_writel(host, clk_ctrl, SDHCI_TEGRA_VENDOR_CLOCK_CTRL);

		if (soc_data->nvquirks & NVQUIRK_HAS_PADCALIB)
		if (soc_data->nvquirks & NVQUIRK_HAS_PADCALIB) {
		pad_ctrl = sdhci_readl(host, SDHCI_TEGRA_SDMEM_COMP_PADCTRL);
		pad_ctrl &= ~SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_MASK;
		pad_ctrl \|= SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_VAL;
		sdhci_writel(host, pad_ctrl, SDHCI_TEGRA_SDMEM_COMP_PADCTRL);

		tegra_host->pad_calib_required = true;
		}

		tegra_host->ddr_signaling = false;
		}