Commit 9d0d8867 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'i2c/for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux 

Pull i2c updates from Wolfram Sang:
 "A bit smaller this time with mostly usual driver updates. Slave
  support for imx stands out a little"

* 'i2c/for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (30 commits)
  i2c: remove check that can never be true
  i2c: Warn when device removing fails
  dt-bindings: i2c: Update DT binding docs to support SiFive FU740 SoC
  dt-bindings: i2c: Add compatible string for AM64 SoC
  i2c: designware: Make register offsets all of the same width
  i2c: designware: Switch header to use BIT() and GENMASK()
  i2c: pxa: move to generic GPIO recovery
  i2c: sh_mobile: Mark adapter suspended during suspend
  i2c: owl: Add compatible for the Actions Semi S500 I2C controller
  dt-bindings: i2c: owl: Convert Actions Semi Owl binding to a schema
  i2c: imx: support slave mode for imx I2C driver
  i2c: ismt: Adding support for I2C_SMBUS_BLOCK_PROC_CALL
  i2c: ocores: Avoid false-positive error log message.
  Revert "i2c: qcom-geni: Disable DMA processing on the Lenovo Yoga C630"
  i2c: mxs: Remove unneeded platform_device_id
  i2c: pca-platform: drop two members from driver data that are assigned to only
  i2c: imx: Remove unused .id_table support
  i2c: nvidia-gpu: drop empty stub for runtime pm
  dt-bindings: i2c: mellanox,i2c-mlxbf: convert txt to YAML schema
  i2c: mv64xxx: Add bus error recovery
  ...
parents 605ea5aa 4e970a0a

Documentation/devicetree/bindings/i2c/i2c-ocores.txt

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@@ -5,8 +5,12 @@ Required properties: 
                    "aeroflexgaisler,i2cmst"

                    "sifive,fu540-c000-i2c", "sifive,i2c0"

                    For Opencore based I2C IP block reimplemented in

                    FU540-C000 SoC. Please refer to sifive-blocks-ip-versioning.txt

                    for additional details.

                    FU540-C000 SoC.

                    "sifive,fu740-c000-i2c", "sifive,i2c0"

                    For Opencore based I2C IP block reimplemented in

                    FU740-C000 SoC.

                    Please refer to sifive-blocks-ip-versioning.txt for

                    additional details.

- reg             : bus address start and address range size of device

- clocks          : handle to the controller clock; see the note below.

                    Mutually exclusive with opencores,ip-clock-frequency

Documentation/devicetree/bindings/i2c/i2c-omap.txt

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@@ -8,6 +8,7 @@ Required properties : 
	"ti,omap4-i2c" for OMAP4+ SoCs

	"ti,am654-i2c", "ti,omap4-i2c" for AM654 SoCs

	"ti,j721e-i2c", "ti,omap4-i2c" for J721E SoCs

	"ti,am64-i2c", "ti,omap4-i2c" for AM64 SoCs

- ti,hwmods : Must be "i2c<n>", n being the instance number (1-based)

- #address-cells = <1>;

- #size-cells = <0>;

Documentation/devicetree/bindings/i2c/i2c-owl.txt

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Actions Semiconductor Owl I2C controller



Required properties:



- compatible        : Should be one of the following:

		      - "actions,s700-i2c" for S700 SoC

		      - "actions,s900-i2c" for S900 SoC

- reg               : Offset and length of the register set for the device.

- #address-cells    : Should be 1.

- #size-cells       : Should be 0.

- interrupts        : A single interrupt specifier.

- clocks            : Phandle of the clock feeding the I2C controller.



Optional properties:



- clock-frequency   : Desired I2C bus clock frequency in Hz. As only Normal and

                      Fast modes are supported, possible values are 100000 and

                      400000.

Examples:



        i2c0: i2c@e0170000 {

                compatible = "actions,s900-i2c";

                reg = <0 0xe0170000 0 0x1000>;

                #address-cells = <1>;

                #size-cells = <0>;

                interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;

                clocks = <&clock CLK_I2C0>;

                clock-frequency = <100000>;

        };

Documentation/devicetree/bindings/i2c/i2c-owl.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/i2c/i2c-owl.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Actions Semi Owl I2C Controller



maintainers:

  - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>



description: |

  This I2C controller is found in the Actions Semi Owl SoCs:

  S500, S700 and S900.



allOf:

  - $ref: /schemas/i2c/i2c-controller.yaml#



properties:

  compatible:

    enum:

      - actions,s500-i2c # Actions Semi S500 compatible SoCs

      - actions,s700-i2c # Actions Semi S700 compatible SoCs

      - actions,s900-i2c # Actions Semi S900 compatible SoCs



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    description: Phandle of the clock feeding the I2C controller.

    minItems: 1



  clock-frequency:

    description: |

      Desired I2C bus clock frequency in Hz. As only Standard and Fast

      modes are supported, possible values are 100000 and 400000.

    enum: [100000, 400000]



required:

  - compatible

  - reg

  - interrupts

  - clocks



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/clock/actions,s900-cmu.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    i2c@e0170000 {

        compatible = "actions,s900-i2c";

        reg = <0xe0170000 0x1000>;

        interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;

        clocks = <&cmu CLK_I2C0>;

        clock-frequency = <100000>;

    };



...

Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt

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Device tree configuration for the Mellanox I2C SMBus on BlueField SoCs



Required Properties:



- compatible : should be "mellanox,i2c-mlxbf1" or "mellanox,i2c-mlxbf2".



- reg : address offset and length of the device registers. The

	registers consist of the following set of resources:

		1) Smbus block registers.

		2) Cause master registers.

		3) Cause slave registers.

		4) Cause coalesce registers (if compatible isn't set

		   to "mellanox,i2c-mlxbf1").



- interrupts : interrupt number.



Optional Properties:



- clock-frequency : bus frequency used to configure timing registers;

			allowed values are 100000, 400000 and 1000000;

			those are expressed in Hz. Default is 100000.



Example:



i2c@2804000 {

	compatible = "mellanox,i2c-mlxbf1";

	reg =	<0x02804000 0x800>,

		<0x02801200 0x020>,

		<0x02801260 0x020>;

	interrupts = <57>;

	clock-frequency = <100000>;

};



i2c@2808800 {

	compatible = "mellanox,i2c-mlxbf2";

	reg =	<0x02808800 0x600>,

	        <0x02808e00 0x020>,

		<0x02808e20 0x020>,

		<0x02808e40 0x010>;

	interrupts = <57>;

	clock-frequency = <400000>;

};

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