Commit 9cf1e35c authored by Zhenyu Wang's avatar Zhenyu Wang Committed by Eric Anholt
Browse files

agp/intel: new host bridge support 



Add new CPU host bridge id, needed for support Ironlake graphics
device with it. No change for graphics device itself, so no need to
update drm/i915.

Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: default avatarEric Anholt <eric@anholt.net>
parent 5586c8bc

drivers/char/agp/intel-agp.c

+7 −1
Original line number Diff line number Diff line
@@ -62,6 +62,7 @@ 
#define PCI_DEVICE_ID_INTEL_IGDNG_D_IG	    0x0042

#define PCI_DEVICE_ID_INTEL_IGDNG_M_HB	    0x0044

#define PCI_DEVICE_ID_INTEL_IGDNG_MA_HB	    0x0062

#define PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB    0x006a

#define PCI_DEVICE_ID_INTEL_IGDNG_M_IG	    0x0046



/* cover 915 and 945 variants */
@@ -96,7 +97,8 @@ 
		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_B43_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_D_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_M_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_MA_HB)

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_MA_HB || \

		agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB)



extern int agp_memory_reserved;
@@ -1364,6 +1366,7 @@ static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size) 
	case PCI_DEVICE_ID_INTEL_IGDNG_D_HB:

	case PCI_DEVICE_ID_INTEL_IGDNG_M_HB:

	case PCI_DEVICE_ID_INTEL_IGDNG_MA_HB:

	case PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB:

		*gtt_offset = *gtt_size = MB(2);

		break;

	default:
@@ -2365,6 +2368,8 @@ static const struct intel_driver_description { 
	    "IGDNG/M", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_IGDNG_MA_HB, PCI_DEVICE_ID_INTEL_IGDNG_M_IG, 0,

	    "IGDNG/MA", NULL, &intel_i965_driver },

	{ PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB, PCI_DEVICE_ID_INTEL_IGDNG_M_IG, 0,

	    "IGDNG/MC2", NULL, &intel_i965_driver },

	{ 0, 0, 0, NULL, NULL, NULL }

};
@@ -2561,6 +2566,7 @@ static struct pci_device_id agp_intel_pci_table[] = { 
	ID(PCI_DEVICE_ID_INTEL_IGDNG_D_HB),

	ID(PCI_DEVICE_ID_INTEL_IGDNG_M_HB),

	ID(PCI_DEVICE_ID_INTEL_IGDNG_MA_HB),

	ID(PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB),

	{ }

};

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