Commit 9cea1698 authored Nov 11, 2020 by Linus Walleij

drm/panel: s6e63m0: Add some explanations



The SPI DCS code was a bit hard to understand as the
device accepts 9-bit transfers packed into 16-bit words
with the most significant bit in bit 9 of the
16-bit word. Add some clarifying comments.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Stephan Gerhold <stephan@gerhold.net>
Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201110234653.2248594-4-linus.walleij@linaro.org

parent 1b72ea1e

drivers/gpu/drm/panel/panel-samsung-s6e63m0-spi.c

+7 −0

Original line number	Diff line number	Diff line
		@@ -42,10 +42,17 @@ static int s6e63m0_spi_dcs_write(struct device dev, const u8 data, size_t len)
		int ret = 0;

		dev_dbg(dev, "SPI writing dcs seq: %*ph\n", (int)len, data);

		/*
		* This sends 9 bits with the first bit (bit 8) set to 0
		* This indicates that this is a command. Anything after the
		* command is data.
		*/
		ret = s6e63m0_spi_write_word(dev, *data);

		while (!ret && --len) {
		++data;
		/* This sends 9 bits with the first bit (bit 8) set to 1 */
		ret = s6e63m0_spi_write_word(dev, *data \| DATA_MASK);
		}

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