Commit 9cd34729 authored by Linus Walleij's avatar Linus Walleij
Browse files

Merge tag 'intel-pinctrl-v5.7-2' of... 

Merge tag 'intel-pinctrl-v5.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into fixes

intel-pinctrl for v5.7-2

* Enable pin configuration setting for Baytrail
* Fix interrupt handling due to hardware sighting for Cherryview
* Fix PAD lock offset for Sunrisepoint-H

The following is an automated git shortlog grouped by driver:

baytrail:
 -  Enable pin configuration setting for GPIO chip

cherryview:
 -  Add missing spinlock usage in chv_gpio_irq_handler

sunrisepoint:
 -  Fix PAD lock register offset for SPT-H
parents 90bcb0c3 69388e15

drivers/pinctrl/intel/pinctrl-baytrail.c

+1 −0
Original line number Diff line number Diff line
@@ -1286,6 +1286,7 @@ static const struct gpio_chip byt_gpio_chip = { 
	.direction_output	= byt_gpio_direction_output,

	.get			= byt_gpio_get,

	.set			= byt_gpio_set,

	.set_config		= gpiochip_generic_config,

	.dbg_show		= byt_gpio_dbg_show,

};

drivers/pinctrl/intel/pinctrl-cherryview.c

+4 −0
Original line number Diff line number Diff line
@@ -1479,11 +1479,15 @@ static void chv_gpio_irq_handler(struct irq_desc *desc) 
	struct chv_pinctrl *pctrl = gpiochip_get_data(gc);

	struct irq_chip *chip = irq_desc_get_chip(desc);

	unsigned long pending;

	unsigned long flags;

	u32 intr_line;



	chained_irq_enter(chip, desc);



	raw_spin_lock_irqsave(&chv_lock, flags);

	pending = readl(pctrl->regs + CHV_INTSTAT);

	raw_spin_unlock_irqrestore(&chv_lock, flags);



	for_each_set_bit(intr_line, &pending, pctrl->community->nirqs) {

		unsigned int irq, offset;

drivers/pinctrl/intel/pinctrl-sunrisepoint.c

+8 −7
Original line number Diff line number Diff line
@@ -16,7 +16,8 @@ 
#include "pinctrl-intel.h"



#define SPT_PAD_OWN		0x020

#define SPT_PADCFGLOCK	0x0a0

#define SPT_H_PADCFGLOCK	0x090

#define SPT_LP_PADCFGLOCK	0x0a0

#define SPT_HOSTSW_OWN		0x0d0

#define SPT_GPI_IS		0x100

#define SPT_GPI_IE		0x120
@@ -25,7 +26,7 @@ 
	{						\

		.barno = (b),				\

		.padown_offset = SPT_PAD_OWN,		\

		.padcfglock_offset = SPT_PADCFGLOCK,	\

		.padcfglock_offset = SPT_LP_PADCFGLOCK,	\

		.hostown_offset = SPT_HOSTSW_OWN,	\

		.is_offset = SPT_GPI_IS,		\

		.ie_offset = SPT_GPI_IE,		\
@@ -47,7 +48,7 @@ 
	{						\

		.barno = (b),				\

		.padown_offset = SPT_PAD_OWN,		\

		.padcfglock_offset = SPT_PADCFGLOCK,	\

		.padcfglock_offset = SPT_H_PADCFGLOCK,	\

		.hostown_offset = SPT_HOSTSW_OWN,	\

		.is_offset = SPT_GPI_IS,		\

		.ie_offset = SPT_GPI_IE,		\

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