ARM: 7725/1: mmc: mmci: Cache MMCIDATACTRL register (9cc639a2) · Commits · 戴 / test

drivers/mmc/host/mmci.c

+14 −3

Original line number	Diff line number	Diff line
		@@ -188,6 +188,17 @@ static void mmci_write_pwrreg(struct mmci_host *host, u32 pwr)
		}
		}

		/*
		* This must be called with host->lock held
		*/
		static void mmci_write_datactrlreg(struct mmci_host *host, u32 datactrl)
		{
		if (host->datactrl_reg != datactrl) {
		host->datactrl_reg = datactrl;
		writel(datactrl, host->base + MMCIDATACTRL);
		}
		}

		/*
		* This must be called with host->lock held
		*/
		@@ -281,7 +292,7 @@ static void mmci_set_mask1(struct mmci_host *host, unsigned int mask)

		static void mmci_stop_data(struct mmci_host *host)
		{
		writel(0, host->base + MMCIDATACTRL);
		mmci_write_datactrlreg(host, 0);
		mmci_set_mask1(host, 0);
		host->data = NULL;
		}
		@@ -559,7 +570,7 @@ static int mmci_dma_start_data(struct mmci_host *host, unsigned int datactrl)
		datactrl \|= MCI_DPSM_DMAENABLE;

		/* Trigger the DMA transfer */
		writel(datactrl, host->base + MMCIDATACTRL);
		mmci_write_datactrlreg(host, datactrl);

		/*
		* Let the MMCI say when the data is ended and it's time
		@@ -757,7 +768,7 @@ static void mmci_start_data(struct mmci_host host, struct mmc_data data)
		irqmask = MCI_TXFIFOHALFEMPTYMASK;
		}

		writel(datactrl, base + MMCIDATACTRL);
		mmci_write_datactrlreg(host, datactrl);
		writel(readl(base + MMCIMASK0) & ~MCI_DATAENDMASK, base + MMCIMASK0);
		mmci_set_mask1(host, irqmask);
		}

+1 −0

Original line number	Diff line number	Diff line
		@@ -183,6 +183,7 @@ struct mmci_host {
		unsigned int cclk;
		u32 pwr_reg;
		u32 clk_reg;
		u32 datactrl_reg;
		bool vqmmc_enabled;
		struct mmci_platform_data *plat;
		struct variant_data *variant;