Commit 9cba4056 authored by Rob Clark's avatar Rob Clark
Browse files

drm/msm: Set adreno_smmu as gpu's drvdata



This will be populated by adreno-smmu, to provide a way for coordinating
enabling/disabling TTBR0 translation.

Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
Reviewed-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
Reviewed-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 69a9313b
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+0 −2
Original line number Diff line number Diff line
@@ -417,8 +417,6 @@ static int adreno_bind(struct device *dev, struct device *master, void *data)
		return PTR_ERR(gpu);
	}

	dev_set_drvdata(dev, gpu);

	return 0;
}

+1 −1
Original line number Diff line number Diff line
@@ -896,7 +896,7 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev,
		gpu->gpu_cx = NULL;

	gpu->pdev = pdev;
	platform_set_drvdata(pdev, gpu);
	platform_set_drvdata(pdev, &gpu->adreno_smmu);

	msm_devfreq_init(gpu);

+5 −1
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@
#ifndef __MSM_GPU_H__
#define __MSM_GPU_H__

#include <linux/adreno-smmu-priv.h>
#include <linux/clk.h>
#include <linux/interconnect.h>
#include <linux/pm_opp.h>
@@ -74,6 +75,8 @@ struct msm_gpu {
	struct platform_device *pdev;
	const struct msm_gpu_funcs *funcs;

	struct adreno_smmu_priv adreno_smmu;

	/* performance counters (hw & sw): */
	spinlock_t perf_lock;
	bool perfcntr_active;
@@ -146,7 +149,8 @@ struct msm_gpu {

static inline struct msm_gpu *dev_to_gpu(struct device *dev)
{
	return dev_get_drvdata(dev);
	struct adreno_smmu_priv *adreno_smmu = dev_get_drvdata(dev);
	return container_of(adreno_smmu, struct msm_gpu, adreno_smmu);
}

/* It turns out that all targets use the same ringbuffer size */