Commit 9ca678d1 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branches 'pci/enumeration' and 'pci/misc' into next 

* pci/enumeration:
  PCI: Set MPS to match upstream bridge
  PCI: Move MPS configuration check to pci_configure_device()
  PCI: Drop references acquired by of_parse_phandle()
  PCI/MSI: Remove unused pcibios_msi_controller() hook
  ARM/PCI: Remove msi_controller from struct pci_sys_data
  ARM/PCI, designware, xilinx: Use pci_scan_root_bus_msi()
  PCI: Add pci_scan_root_bus_msi()
  ARM/PCI: Replace panic with WARN messages on failures
  PCI: generic: Add arm64 support
  PCI: Build setup-irq.o for arm64
  PCI: generic: Remove dependency on ARM-specific struct hw_pci
  ARM/PCI: Set MPS before pci_bus_add_devices()

* pci/misc:
  PCI: Disable async suspend/resume for JMicron multi-function SATA/AHCI
parents 2fc32c92 27d868b5 91f15fb3

arch/arm/include/asm/mach/pci.h

+0 −5
Original line number Diff line number Diff line
@@ -19,9 +19,7 @@ struct pci_bus; 
struct device;



struct hw_pci {

#ifdef CONFIG_PCI_MSI

	struct msi_controller *msi_ctrl;

#endif

	struct pci_ops	*ops;

	int		nr_controllers;

	void		**private_data;
@@ -42,9 +40,6 @@ struct hw_pci { 
 * Per-controller structure

 */

struct pci_sys_data {

#ifdef CONFIG_PCI_MSI

	struct msi_controller *msi_ctrl;

#endif

	struct list_head node;

	int		busnr;		/* primary bus number			*/

	u64		mem_offset;	/* bus->cpu memory mapping offset	*/

arch/arm/kernel/bios32.c

+14 −31
Original line number Diff line number Diff line
@@ -18,15 +18,6 @@ 


static int debug_pci;



#ifdef CONFIG_PCI_MSI

struct msi_controller *pcibios_msi_controller(struct pci_dev *dev)

{

	struct pci_sys_data *sysdata = dev->bus->sysdata;



	return sysdata->msi_ctrl;

}

#endif



/*

 * We can't use pci_get_device() here since we are

 * called from interrupt context.
@@ -459,12 +450,9 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw, 


	for (nr = busnr = 0; nr < hw->nr_controllers; nr++) {

		sys = kzalloc(sizeof(struct pci_sys_data), GFP_KERNEL);

		if (!sys)

			panic("PCI: unable to allocate sys data!");

		if (WARN(!sys, "PCI: unable to allocate sys data!"))

			break;



#ifdef CONFIG_PCI_MSI

		sys->msi_ctrl = hw->msi_ctrl;

#endif

		sys->busnr   = busnr;

		sys->swizzle = hw->swizzle;

		sys->map_irq = hw->map_irq;
@@ -486,11 +474,14 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw, 
			if (hw->scan)

				sys->bus = hw->scan(nr, sys);

			else

				sys->bus = pci_scan_root_bus(parent, sys->busnr,

						hw->ops, sys, &sys->resources);

				sys->bus = pci_scan_root_bus_msi(parent,

					sys->busnr, hw->ops, sys,

					&sys->resources, hw->msi_ctrl);



			if (!sys->bus)

				panic("PCI: unable to scan bus!");

			if (WARN(!sys->bus, "PCI: unable to scan bus!")) {

				kfree(sys);

				break;

			}



			busnr = sys->bus->busn_res.end + 1;
@@ -521,6 +512,8 @@ void pci_common_init_dev(struct device *parent, struct hw_pci *hw) 
		struct pci_bus *bus = sys->bus;



		if (!pci_has_flag(PCI_PROBE_ONLY)) {

			struct pci_bus *child;



			/*

			 * Size the bridge windows.

			 */
@@ -530,25 +523,15 @@ void pci_common_init_dev(struct device *parent, struct hw_pci *hw) 
			 * Assign resources.

			 */

			pci_bus_assign_resources(bus);

		}



			list_for_each_entry(child, &bus->children, node)

				pcie_bus_configure_settings(child);

		}

		/*

		 * Tell drivers about devices found.

		 */

		pci_bus_add_devices(bus);

	}



	list_for_each_entry(sys, &head, node) {

		struct pci_bus *bus = sys->bus;



		/* Configure PCI Express settings */

		if (bus && !pci_has_flag(PCI_PROBE_ONLY)) {

			struct pci_bus *child;



			list_for_each_entry(child, &bus->children, node)

				pcie_bus_configure_settings(child);

		}

	}

}



#ifndef CONFIG_PCI_HOST_ITE8152

drivers/ata/ahci.c

+1 −12
Original line number Diff line number Diff line
@@ -351,6 +351,7 @@ static const struct pci_device_id ahci_pci_tbl[] = { 
	/* JMicron 362B and 362C have an AHCI function with IDE class code */

	{ PCI_VDEVICE(JMICRON, 0x2362), board_ahci_ign_iferr },

	{ PCI_VDEVICE(JMICRON, 0x236f), board_ahci_ign_iferr },

	/* May need to update quirk_jmicron_async_suspend() for additions */



	/* ATI */

	{ PCI_VDEVICE(ATI, 0x4380), board_ahci_sb600 }, /* ATI SB600 */
@@ -1451,18 +1452,6 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 
	else if (pdev->vendor == 0x177d && pdev->device == 0xa01c)

		ahci_pci_bar = AHCI_PCI_BAR_CAVIUM;



	/*

	 * The JMicron chip 361/363 contains one SATA controller and one

	 * PATA controller,for powering on these both controllers, we must

	 * follow the sequence one by one, otherwise one of them can not be

	 * powered on successfully, so here we disable the async suspend

	 * method for these chips.

	 */

	if (pdev->vendor == PCI_VENDOR_ID_JMICRON &&

		(pdev->device == PCI_DEVICE_ID_JMICRON_JMB363 ||

		pdev->device == PCI_DEVICE_ID_JMICRON_JMB361))

		device_disable_async_suspend(&pdev->dev);



	/* acquire resources */

	rc = pcim_enable_device(pdev);

	if (rc)

drivers/ata/pata_jmicron.c

+0 −12
Original line number Diff line number Diff line
@@ -143,18 +143,6 @@ static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *i 
	};

	const struct ata_port_info *ppi[] = { &info, NULL };



	/*

	 * The JMicron chip 361/363 contains one SATA controller and one

	 * PATA controller,for powering on these both controllers, we must

	 * follow the sequence one by one, otherwise one of them can not be

	 * powered on successfully, so here we disable the async suspend

	 * method for these chips.

	 */

	if (pdev->vendor == PCI_VENDOR_ID_JMICRON &&

		(pdev->device == PCI_DEVICE_ID_JMICRON_JMB363 ||

		pdev->device == PCI_DEVICE_ID_JMICRON_JMB361))

		device_disable_async_suspend(&pdev->dev);



	return ata_pci_bmdma_init_one(pdev, ppi, &jmicron_sht, NULL, 0);

}

drivers/pci/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -33,6 +33,7 @@ obj-$(CONFIG_PCI_IOV) += iov.o 
#

obj-$(CONFIG_ALPHA) += setup-irq.o

obj-$(CONFIG_ARM) += setup-irq.o

obj-$(CONFIG_ARM64) += setup-irq.o

obj-$(CONFIG_UNICORE32) += setup-irq.o

obj-$(CONFIG_SUPERH) += setup-irq.o

obj-$(CONFIG_MIPS) += setup-irq.o

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