Commit 9c52a264 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'drivers_soc_for_5.9' of... 

Merge tag 'drivers_soc_for_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers

SOC: TI Keystone driver update for v5.9

 - TI K3 Ring Accelerator updates
 - Few non critical warining fixes

* tag 'drivers_soc_for_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  soc: TI knav_qmss: make symbol 'knav_acc_range_ops' static
  firmware: ti_sci: Replace HTTP links with HTTPS ones
  soc: ti/ti_sci_protocol.h: drop a duplicated word + clarify
  soc: ti: k3: fix semicolon.cocci warnings
  soc: ti: k3-ringacc: fix: warn: variable dereferenced before check 'ring'
  dmaengine: ti: k3-udma: Switch to k3_ringacc_request_rings_pair
  soc: ti: k3-ringacc: separate soc specific initialization
  soc: ti: k3-ringacc: add request pair of rings api.
  soc: ti: k3-ringacc: add ring's flags to dump
  soc: ti: k3-ringacc: Move state tracking variables under a struct
  dt-bindings: soc: ti: k3-ringacc: convert bindings to json-schema

Link: https://lore.kernel.org/r/1595711814-7015-1-git-send-email-santosh.shilimkar@oracle.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents ab274a7e 09241e61

Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt

+1 −1
Original line number Diff line number Diff line
@@ -55,7 +55,7 @@ Required Properties: 
			corresponds to a range of host irqs.



For more details on TISCI IRQ resource management refer:

http://downloads.ti.com/tisci/esd/latest/2_tisci_msgs/rm/rm_irq.html

https://downloads.ti.com/tisci/esd/latest/2_tisci_msgs/rm/rm_irq.html



Example:

--------

Documentation/devicetree/bindings/soc/ti/k3-ringacc.txt

deleted100644 → 0
+0 −59
Original line number Diff line number Diff line 
* Texas Instruments K3 NavigatorSS Ring Accelerator



The Ring Accelerator (RA) is a machine which converts read/write accesses

from/to a constant address into corresponding read/write accesses from/to a

circular data structure in memory. The RA eliminates the need for each DMA

controller which needs to access ring elements from having to know the current

state of the ring (base address, current offset). The DMA controller

performs a read or write access to a specific address range (which maps to the

source interface on the RA) and the RA replaces the address for the transaction

with a new address which corresponds to the head or tail element of the ring

(head for reads, tail for writes).



The Ring Accelerator is a hardware module that is responsible for accelerating

management of the packet queues. The K3 SoCs can have more than one RA instances



Required properties:

- compatible	: Must be "ti,am654-navss-ringacc";

- reg		: Should contain register location and length of the following

		  named register regions.

- reg-names	: should be

		  "rt" - The RA Ring Real-time Control/Status Registers

		  "fifos" - The RA Queues Registers

		  "proxy_gcfg" - The RA Proxy Global Config Registers

		  "proxy_target" - The RA Proxy Datapath Registers

- ti,num-rings	: Number of rings supported by RA

- ti,sci-rm-range-gp-rings : TI-SCI RM subtype for GP ring range

- ti,sci	: phandle on TI-SCI compatible System controller node

- ti,sci-dev-id	: TI-SCI device id of the ring accelerator

- msi-parent	: phandle for "ti,sci-inta" interrupt controller



Optional properties:

 -- ti,dma-ring-reset-quirk : enable ringacc / udma ring state interoperability

		  issue software w/a



Example:



ringacc: ringacc@3c000000 {

	compatible = "ti,am654-navss-ringacc";

	reg =	<0x0 0x3c000000 0x0 0x400000>,

		<0x0 0x38000000 0x0 0x400000>,

		<0x0 0x31120000 0x0 0x100>,

		<0x0 0x33000000 0x0 0x40000>;

	reg-names = "rt", "fifos",

		    "proxy_gcfg", "proxy_target";

	ti,num-rings = <818>;

	ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */

	ti,dma-ring-reset-quirk;

	ti,sci = <&dmsc>;

	ti,sci-dev-id = <187>;

	msi-parent = <&inta_main_udmass>;

};



client:



dma_ipx: dma_ipx@<addr> {

	...

	ti,ringacc = <&ringacc>;

	...

}

Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml

0 → 100644
+102 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

# Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/

%YAML 1.2

---

$id: "http://devicetree.org/schemas/soc/ti/k3-ringacc.yaml#"

$schema: "http://devicetree.org/meta-schemas/core.yaml#"



title: Texas Instruments K3 NavigatorSS Ring Accelerator



maintainers:

  - Santosh Shilimkar <ssantosh@kernel.org>

  - Grygorii Strashko <grygorii.strashko@ti.com>



description: |

  The Ring Accelerator (RA) is a machine which converts read/write accesses

  from/to a constant address into corresponding read/write accesses from/to a

  circular data structure in memory. The RA eliminates the need for each DMA

  controller which needs to access ring elements from having to know the current

  state of the ring (base address, current offset). The DMA controller

  performs a read or write access to a specific address range (which maps to the

  source interface on the RA) and the RA replaces the address for the transaction

  with a new address which corresponds to the head or tail element of the ring

  (head for reads, tail for writes).



  The Ring Accelerator is a hardware module that is responsible for accelerating

  management of the packet queues. The K3 SoCs can have more than one RA instances



properties:

  compatible:

    items:

      - const: ti,am654-navss-ringacc



  reg:

    items:

      - description: real time registers regions

      - description: fifos registers regions

      - description: proxy gcfg registers regions

      - description: proxy target registers regions



  reg-names:

    items:

      - const: rt

      - const: fifos

      - const: proxy_gcfg

      - const: proxy_target



  msi-parent: true



  ti,num-rings:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: Number of rings supported by RA



  ti,sci-rm-range-gp-rings:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: TI-SCI RM subtype for GP ring range



  ti,sci:

    $ref: /schemas/types.yaml#definitions/phandle-array

    description: phandle on TI-SCI compatible System controller node



  ti,sci-dev-id:

    $ref: /schemas/types.yaml#/definitions/uint32

    description: TI-SCI device id of the ring accelerator



  ti,dma-ring-reset-quirk:

    $ref: /schemas/types.yaml#definitions/flag

    description: |

      enable ringacc/udma ring state interoperability issue software w/a



required:

  - compatible

  - reg

  - reg-names

  - msi-parent

  - ti,num-rings

  - ti,sci-rm-range-gp-rings

  - ti,sci

  - ti,sci-dev-id



additionalProperties: false



examples:

  - |

    bus {

        #address-cells = <2>;

        #size-cells = <2>;



        ringacc: ringacc@3c000000 {

            compatible = "ti,am654-navss-ringacc";

            reg = <0x0 0x3c000000 0x0 0x400000>,

                  <0x0 0x38000000 0x0 0x400000>,

                  <0x0 0x31120000 0x0 0x100>,

                  <0x0 0x33000000 0x0 0x40000>;

            reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";

            ti,num-rings = <818>;

            ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */

            ti,dma-ring-reset-quirk;

            ti,sci = <&dmsc>;

            ti,sci-dev-id = <187>;

            msi-parent = <&inta_main_udmass>;

        };

    };

drivers/dma/ti/k3-udma-glue.c

+13 −29
Original line number Diff line number Diff line
@@ -271,20 +271,12 @@ struct k3_udma_glue_tx_channel *k3_udma_glue_request_tx_chn(struct device *dev, 
	atomic_set(&tx_chn->free_pkts, cfg->txcq_cfg.size);



	/* request and cfg rings */

	tx_chn->ringtx = k3_ringacc_request_ring(tx_chn->common.ringacc,

						 tx_chn->udma_tchan_id, 0);

	if (!tx_chn->ringtx) {

		ret = -ENODEV;

		dev_err(dev, "Failed to get TX ring %u\n",

			tx_chn->udma_tchan_id);

		goto err;

	}



	tx_chn->ringtxcq = k3_ringacc_request_ring(tx_chn->common.ringacc,

						   -1, 0);

	if (!tx_chn->ringtxcq) {

		ret = -ENODEV;

		dev_err(dev, "Failed to get TXCQ ring\n");

	ret =  k3_ringacc_request_rings_pair(tx_chn->common.ringacc,

					     tx_chn->udma_tchan_id, -1,

					     &tx_chn->ringtx,

					     &tx_chn->ringtxcq);

	if (ret) {

		dev_err(dev, "Failed to get TX/TXCQ rings %d\n", ret);

		goto err;

	}
@@ -587,22 +579,16 @@ static int k3_udma_glue_cfg_rx_flow(struct k3_udma_glue_rx_channel *rx_chn, 
	}



	/* request and cfg rings */

	flow->ringrx = k3_ringacc_request_ring(rx_chn->common.ringacc,

					       flow_cfg->ring_rxq_id, 0);

	if (!flow->ringrx) {

		ret = -ENODEV;

		dev_err(dev, "Failed to get RX ring\n");

	ret =  k3_ringacc_request_rings_pair(rx_chn->common.ringacc,

					     flow_cfg->ring_rxq_id,

					     flow_cfg->ring_rxfdq0_id,

					     &flow->ringrxfdq,

					     &flow->ringrx);

	if (ret) {

		dev_err(dev, "Failed to get RX/RXFDQ rings %d\n", ret);

		goto err_rflow_put;

	}



	flow->ringrxfdq = k3_ringacc_request_ring(rx_chn->common.ringacc,

						  flow_cfg->ring_rxfdq0_id, 0);

	if (!flow->ringrxfdq) {

		ret = -ENODEV;

		dev_err(dev, "Failed to get RXFDQ ring\n");

		goto err_ringrx_free;

	}



	ret = k3_ringacc_ring_cfg(flow->ringrx, &flow_cfg->rx_cfg);

	if (ret) {

		dev_err(dev, "Failed to cfg ringrx %d\n", ret);
@@ -673,8 +659,6 @@ static int k3_udma_glue_cfg_rx_flow(struct k3_udma_glue_rx_channel *rx_chn, 


err_ringrxfdq_free:

	k3_ringacc_ring_free(flow->ringrxfdq);



err_ringrx_free:

	k3_ringacc_ring_free(flow->ringrx);



err_rflow_put:

drivers/dma/ti/k3-udma.c

+11 −23
Original line number Diff line number Diff line
@@ -1418,17 +1418,12 @@ static int udma_alloc_tx_resources(struct udma_chan *uc) 
	if (ret)

		return ret;



	uc->tchan->t_ring = k3_ringacc_request_ring(ud->ringacc,

						    uc->tchan->id, 0);

	if (!uc->tchan->t_ring) {

		ret = -EBUSY;

		goto err_tx_ring;

	}



	uc->tchan->tc_ring = k3_ringacc_request_ring(ud->ringacc, -1, 0);

	if (!uc->tchan->tc_ring) {

	ret = k3_ringacc_request_rings_pair(ud->ringacc, uc->tchan->id, -1,

					    &uc->tchan->t_ring,

					    &uc->tchan->tc_ring);

	if (ret) {

		ret = -EBUSY;

		goto err_txc_ring;

		goto err_ring;

	}



	memset(&ring_cfg, 0, sizeof(ring_cfg));
@@ -1447,10 +1442,9 @@ static int udma_alloc_tx_resources(struct udma_chan *uc) 
err_ringcfg:

	k3_ringacc_ring_free(uc->tchan->tc_ring);

	uc->tchan->tc_ring = NULL;

err_txc_ring:

	k3_ringacc_ring_free(uc->tchan->t_ring);

	uc->tchan->t_ring = NULL;

err_tx_ring:

err_ring:

	udma_put_tchan(uc);



	return ret;
@@ -1499,16 +1493,11 @@ static int udma_alloc_rx_resources(struct udma_chan *uc) 


	rflow = uc->rflow;

	fd_ring_id = ud->tchan_cnt + ud->echan_cnt + uc->rchan->id;

	rflow->fd_ring = k3_ringacc_request_ring(ud->ringacc, fd_ring_id, 0);

	if (!rflow->fd_ring) {

		ret = -EBUSY;

		goto err_rx_ring;

	}



	rflow->r_ring = k3_ringacc_request_ring(ud->ringacc, -1, 0);

	if (!rflow->r_ring) {

	ret = k3_ringacc_request_rings_pair(ud->ringacc, fd_ring_id, -1,

					    &rflow->fd_ring, &rflow->r_ring);

	if (ret) {

		ret = -EBUSY;

		goto err_rxc_ring;

		goto err_ring;

	}



	memset(&ring_cfg, 0, sizeof(ring_cfg));
@@ -1533,10 +1522,9 @@ static int udma_alloc_rx_resources(struct udma_chan *uc) 
err_ringcfg:

	k3_ringacc_ring_free(rflow->r_ring);

	rflow->r_ring = NULL;

err_rxc_ring:

	k3_ringacc_ring_free(rflow->fd_ring);

	rflow->fd_ring = NULL;

err_rx_ring:

err_ring:

	udma_put_rflow(uc);

err_rflow:

	udma_put_rchan(uc);

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