[IA64] Fix 2.6 kernel for the new ia64 assembler (9c184a07) · Commits · 戴 / test

arch/ia64/kernel/patch.c

+12 −4

Original line number	Diff line number	Diff line
		@@ -64,22 +64,30 @@ ia64_patch (u64 insn_addr, u64 mask, u64 val)
		void
		ia64_patch_imm64 (u64 insn_addr, u64 val)
		{
		ia64_patch(insn_addr,
		/* The assembler may generate offset pointing to either slot 1
		or slot 2 for a long (2-slot) instruction, occupying slots 1
		and 2. */
		insn_addr &= -16UL;
		ia64_patch(insn_addr + 2,
		0x01fffefe000UL, ( ((val & 0x8000000000000000UL) >> 27) /* bit 63 -> 36 */
		\| ((val & 0x0000000000200000UL) << 0) /* bit 21 -> 21 */
		\| ((val & 0x00000000001f0000UL) << 6) /* bit 16 -> 22 */
		\| ((val & 0x000000000000ff80UL) << 20) /* bit 7 -> 27 */
		\| ((val & 0x000000000000007fUL) << 13) /* bit 0 -> 13 */));
		ia64_patch(insn_addr - 1, 0x1ffffffffffUL, val >> 22);
		ia64_patch(insn_addr + 1, 0x1ffffffffffUL, val >> 22);
		}

		void
		ia64_patch_imm60 (u64 insn_addr, u64 val)
		{
		ia64_patch(insn_addr,
		/* The assembler may generate offset pointing to either slot 1
		or slot 2 for a long (2-slot) instruction, occupying slots 1
		and 2. */
		insn_addr &= -16UL;
		ia64_patch(insn_addr + 2,
		0x011ffffe000UL, ( ((val & 0x0800000000000000UL) >> 23) /* bit 59 -> 36 */
		\| ((val & 0x00000000000fffffUL) << 13) /* bit 0 -> 13 */));
		ia64_patch(insn_addr - 1, 0x1fffffffffcUL, val >> 18);
		ia64_patch(insn_addr + 1, 0x1fffffffffcUL, val >> 18);
		}

		/*