Commit 9be6a940 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'qcom-arm64-for-4.19' of... 

Merge tag 'qcom-arm64-for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt

Qualcomm ARM64 Updates for v4.19

* Add support for PM8005/PM8998 and related nodes
* Add/fix nodes on SDM845 for I2c, SPI, UART, and RPMH
* Fix BT LED trigger on DB410c
* Drop legacy clock names on MSM8916
* Add gpio line names on DB820c

* tag 'qcom-arm64-for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux

:
  arm64: dts: qcom: db410c: Fix Bluetooth LED trigger
  arm64: dts: sdm845: Default qupv3_id_0 as "disabled" like _id_1
  arm64: dts: msm8916: drop legacy suffix for clocks used by MSM DRM driver
  arm64: dts: qcom: db820c: Add gpio-line-names property
  arm64: dts: sdm845: Add rpmh-clk node
  arm64: dts: sdm845: Add rpmh-rsc node
  arm64: dts: qcom: sdm845: Enable debug UART and I2C10 on sdm845-mtp
  arm64: dts: qcom: sdm845: Add I2C, SPI, and UART9 nodes
  arm64: dts: qcom: Add pm8005 and pm8998 support
  arm64: dts: qcom: Add pmu node to sdm845

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 94dee386 e53db018

arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -338,7 +338,7 @@ 
			led@6 {

				label = "apq8016-sbc:blue:bt";

				gpios = <&pm8916_mpps 3 GPIO_ACTIVE_HIGH>;

				linux,default-trigger = "bt";

				linux,default-trigger = "bluetooth-power";

				default-state = "off";

			};

		};

arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi

+239 −0
Original line number Diff line number Diff line
@@ -19,6 +19,33 @@ 
#include <dt-bindings/input/input.h>

#include <dt-bindings/gpio/gpio.h>



/*

 * GPIO name legend: proper name = the GPIO line is used as GPIO

 *         NC      = not connected (pin out but not routed from the chip to

 *                   anything the board)

 *         "[PER]" = pin is muxed for [peripheral] (not GPIO)

 *         LSEC    = Low Speed External Connector

 *         P HSEC  = Primary High Speed External Connector

 *         S HSEC  = Secondary High Speed External Connector

 *         J14     = Camera Connector

 *         TP      = Test Points

 *

 * Line names are taken from the schematic "DragonBoard 820c",

 * drawing no: LM25-P2751-1

 *

 * For the lines routed to the external connectors the

 * lines are named after the 96Boards CE Specification 1.0,

 * Appendix "Expansion Connector Signal Description".

 *

 * When the 96Board naming of a line and the schematic name of

 * the same line are in conflict, the 96Board specification

 * takes precedence, which means that the external UART on the

 * LSEC is named UART0 while the schematic and SoC names this

 * UART3. This is only for the informational lines i.e. "[FOO]",

 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only

 * ones actually used for GPIO.

 */



/ {

	aliases {

		serial0 = &blsp2_uart1;
@@ -130,6 +157,218 @@ 
			status = "okay";

		};



		pinctrl@1010000 {

			gpio-line-names =

				"[SPI0_DOUT]", /* GPIO_0, BLSP1_SPI_MOSI, LSEC pin 14 */

				"[SPI0_DIN]", /* GPIO_1, BLSP1_SPI_MISO, LSEC pin 10 */

				"[SPI0_CS]", /* GPIO_2, BLSP1_SPI_CS_N, LSEC pin 12 */

				"[SPI0_SCLK]", /* GPIO_3, BLSP1_SPI_CLK, LSEC pin 8 */

				"[UART1_TxD]", /* GPIO_4, BLSP8_UART_TX, LSEC pin 11 */

				"[UART1_RxD]", /* GPIO_5, BLSP8_UART_RX, LSEC pin 13 */

				"[I2C1_SDA]", /* GPIO_6, BLSP8_I2C_SDA, LSEC pin 21 */

				"[I2C1_SCL]", /* GPIO_7, BLSP8_I2C_SCL, LSEC pin 19 */

				"GPIO-H", /* GPIO_8, LCD0_RESET_N, LSEC pin 30 */

				"TP93", /* GPIO_9 */

				"GPIO-G", /* GPIO_10, MDP_VSYNC_P, LSEC pin 29 */

				"[MDP_VSYNC_S]", /* GPIO_11, S HSEC pin 55 */

				"NC", /* GPIO_12 */

				"[CSI0_MCLK]", /* GPIO_13, CAM_MCLK0, P HSEC pin 15 */

				"[CAM_MCLK1]", /* GPIO_14, J14 pin 11 */

				"[CSI1_MCLK]", /* GPIO_15, CAM_MCLK2, P HSEC pin 17 */

				"TP99", /* GPIO_16 */

				"[I2C2_SDA]", /* GPIO_17, CCI_I2C_SDA0, P HSEC pin 34 */

				"[I2C2_SCL]", /* GPIO_18, CCI_I2C_SCL0, P HSEC pin 32 */

				"[CCI_I2C_SDA1]", /* GPIO_19, S HSEC pin 38 */

				"[CCI_I2C_SCL1]", /* GPIO_20, S HSEC pin 36 */

				"FLASH_STROBE_EN", /* GPIO_21, S HSEC pin 5 */

				"FLASH_STROBE_TRIG", /* GPIO_22, S HSEC pin 1 */

				"GPIO-K", /* GPIO_23, CAM2_RST_N, LSEC pin 33 */

				"GPIO-D", /* GPIO_24, LSEC pin 26 */

				"GPIO-I", /* GPIO_25, CAM0_RST_N, LSEC pin 31 */

				"GPIO-J", /* GPIO_26, CAM0_STANDBY_N, LSEC pin 32 */

				"BLSP6_I2C_SDA", /* GPIO_27 */

				"BLSP6_I2C_SCL", /* GPIO_28 */

				"GPIO-B", /* GPIO_29, TS0_RESET_N, LSEC pin 24 */

				"GPIO30", /* GPIO_30, S HSEC pin 4 */

				"HDMI_CEC", /* GPIO_31 */

				"HDMI_DDC_CLOCK", /* GPIO_32 */

				"HDMI_DDC_DATA", /* GPIO_33 */

				"HDMI_HOT_PLUG_DETECT", /* GPIO_34 */

				"PCIE0_RST_N", /* GPIO_35 */

				"PCIE0_CLKREQ_N", /* GPIO_36 */

				"PCIE0_WAKE", /* GPIO_37 */

				"SD_CARD_DET_N", /* GPIO_38 */

				"TSIF1_SYNC", /* GPIO_39, S HSEC pin 48 */

				"W_DISABLE_N", /* GPIO_40 */

				"[BLSP9_UART_TX]", /* GPIO_41 */

				"[BLSP9_UART_RX]", /* GPIO_42 */

				"[BLSP2_UART_CTS_N]", /* GPIO_43 */

				"[BLSP2_UART_RFR_N]", /* GPIO_44 */

				"[BLSP3_UART_TX]", /* GPIO_45 */

				"[BLSP3_UART_RX]", /* GPIO_46 */

				"[I2C0_SDA]", /* GPIO_47, LS_I2C0_SDA, LSEC pin 17 */

				"[I2C0_SCL]", /* GPIO_48, LS_I2C0_SCL, LSEC pin 15 */

				"[UART0_TxD]", /* GPIO_49, BLSP9_UART_TX, LSEC pin 5 */

				"[UART0_RxD]", /* GPIO_50, BLSP9_UART_RX, LSEC pin 7 */

				"[UART0_CTS]", /* GPIO_51, BLSP9_UART_CTS_N, LSEC pin 3 */

				"[UART0_RTS]", /* GPIO_52, BLSP9_UART_RFR_N, LSEC pin 9 */

				"[CODEC_INT1_N]", /* GPIO_53 */

				"[CODEC_INT2_N]", /* GPIO_54 */

				"[BLSP7_I2C_SDA]", /* GPIO_55 */

				"[BLSP7_I2C_SCL]", /* GPIO_56 */

				"MI2S_MCLK", /* GPIO_57, S HSEC pin 3 */

				"[PCM_CLK]", /* GPIO_58, QUA_MI2S_SCK, LSEC pin 18 */

				"[PCM_FS]", /* GPIO_59, QUA_MI2S_WS, LSEC pin 16 */

				"[PCM_DO]", /* GPIO_60, QUA_MI2S_DATA0, LSEC pin 20 */

				"[PCM_DI]", /* GPIO_61, QUA_MI2S_DATA1, LSEC pin 22 */

				"GPIO-E", /* GPIO_62, LSEC pin 27 */

				"TP87", /* GPIO_63 */

				"[CODEC_RST_N]", /* GPIO_64 */

				"[PCM1_CLK]", /* GPIO_65 */

				"[PCM1_SYNC]", /* GPIO_66 */

				"[PCM1_DIN]", /* GPIO_67 */

				"[PCM1_DOUT]", /* GPIO_68 */

				"AUDIO_REF_CLK", /* GPIO_69 */

				"SLIMBUS_CLK", /* GPIO_70 */

				"SLIMBUS_DATA0", /* GPIO_71 */

				"SLIMBUS_DATA1", /* GPIO_72 */

				"NC", /* GPIO_73 */

				"NC", /* GPIO_74 */

				"NC", /* GPIO_75 */

				"NC", /* GPIO_76 */

				"TP94", /* GPIO_77 */

				"NC", /* GPIO_78 */

				"TP95", /* GPIO_79 */

				"GPIO-A", /* GPIO_80, MEMS_RESET_N, LSEC pin 23 */

				"TP88", /* GPIO_81 */

				"TP89", /* GPIO_82 */

				"TP90", /* GPIO_83 */

				"TP91", /* GPIO_84 */

				"[SD_DAT0]", /* GPIO_85, BLSP12_SPI_MOSI, P HSEC pin 1 */

				"[SD_CMD]", /* GPIO_86, BLSP12_SPI_MISO, P HSEC pin 11 */

				"[SD_DAT3]", /* GPIO_87, BLSP12_SPI_CS_N, P HSEC pin 7 */

				"[SD_SCLK]", /* GPIO_88, BLSP12_SPI_CLK, P HSEC pin 9 */

				"TSIF1_CLK", /* GPIO_89, S HSEC pin 42 */

				"TSIF1_EN", /* GPIO_90, S HSEC pin 46 */

				"TSIF1_DATA", /* GPIO_91, S HSEC pin 44 */

				"NC", /* GPIO_92 */

				"TSIF2_CLK", /* GPIO_93, S HSEC pin 52 */

				"TSIF2_EN", /* GPIO_94, S HSEC pin 56 */

				"TSIF2_DATA", /* GPIO_95, S HSEC pin 54 */

				"TSIF2_SYNC", /* GPIO_96, S HSEC pin 58 */

				"NC", /* GPIO_97 */

				"CAM1_STANDBY_N", /* GPIO_98 */

				"NC", /* GPIO_99 */

				"NC", /* GPIO_100 */

				"[LCD1_RESET_N]", /* GPIO_101, S HSEC pin 51 */

				"BOOT_CONFIG1", /* GPIO_102 */

				"USB_HUB_RESET", /* GPIO_103 */

				"CAM1_RST_N", /* GPIO_104 */

				"NC", /* GPIO_105 */

				"NC", /* GPIO_106 */

				"NC", /* GPIO_107 */

				"NC", /* GPIO_108 */

				"NC", /* GPIO_109 */

				"NC", /* GPIO_110 */

				"NC", /* GPIO_111 */

				"NC", /* GPIO_112 */

				"PMI8994_BUA", /* GPIO_113 */

				"PCIE2_RST_N", /* GPIO_114 */

				"PCIE2_CLKREQ_N", /* GPIO_115 */

				"PCIE2_WAKE", /* GPIO_116 */

				"SSC_IRQ_0", /* GPIO_117 */

				"SSC_IRQ_1", /* GPIO_118 */

				"SSC_IRQ_2", /* GPIO_119 */

				"NC", /* GPIO_120 */

				"GPIO121", /* GPIO_121, S HSEC pin 2 */

				"NC", /* GPIO_122 */

				"SSC_IRQ_6", /* GPIO_123 */

				"SSC_IRQ_7", /* GPIO_124 */

				"GPIO-C", /* GPIO_125, TS_INT0, LSEC pin 25 */

				"BOOT_CONFIG5", /* GPIO_126 */

				"NC", /* GPIO_127 */

				"NC", /* GPIO_128 */

				"BOOT_CONFIG7", /* GPIO_129 */

				"PCIE1_RST_N", /* GPIO_130 */

				"PCIE1_CLKREQ_N", /* GPIO_131 */

				"PCIE1_WAKE", /* GPIO_132 */

				"GPIO-L", /* GPIO_133, CAM2_STANDBY_N, LSEC pin 34 */

				"NC", /* GPIO_134 */

				"NC", /* GPIO_135 */

				"BOOT_CONFIG8", /* GPIO_136 */

				"NC", /* GPIO_137 */

				"NC", /* GPIO_138 */

				"GPS_SSBI2", /* GPIO_139 */

				"GPS_SSBI1", /* GPIO_140 */

				"NC", /* GPIO_141 */

				"NC", /* GPIO_142 */

				"NC", /* GPIO_143 */

				"BOOT_CONFIG6", /* GPIO_144 */

				"NC", /* GPIO_145 */

				"NC", /* GPIO_146 */

				"NC", /* GPIO_147 */

				"NC", /* GPIO_148 */

				"NC"; /* GPIO_149 */

		};



		qcom,spmi@400f000 {

			pmic@0 {

				gpios@c000 {

					gpio-line-names =

						"NC",

						"KEY_VOLP_N",

						"NC",

						"BL1_PWM",

						"GPIO-F", /* BL0_PWM, LSEC pin 28 */

						"BL1_EN",

						"NC",

						"WLAN_EN",

						"NC",

						"NC",

						"NC",

						"NC",

						"NC",

						"NC",

						"DIVCLK1",

						"DIVCLK2",

						"DIVCLK3",

						"DIVCLK4",

						"BT_EN",

						"PMIC_SLB",

						"PMIC_BUA",

						"USB_VBUS_DET";

				};



				mpps@a000 {

					gpio-line-names =

						"VDDPX_BIAS",

						"WIFI_LED",

						"NC",

						"BT_LED",

						"PM_MPP05",

						"PM_MPP06",

						"PM_MPP07",

						"NC";

				};

			};



			pmic@2 {

				gpios@c000 {

					gpio-line-names =

						"NC",

						"SPKR_AMP_EN1",

						"SPKR_AMP_EN2",

						"TP61",

						"NC",

						"USB2_VBUS_DET",

						"NC",

						"NC",

						"NC",

						"NC";

				};

			};

		};



		phy@34000 {

			status = "okay";

		};

arch/arm64/boot/dts/qcom/msm8916.dtsi

+14 −14
Original line number Diff line number Diff line
@@ -858,9 +858,9 @@ 
			clocks = <&gcc GCC_MDSS_AHB_CLK>,

				 <&gcc GCC_MDSS_AXI_CLK>,

				 <&gcc GCC_MDSS_VSYNC_CLK>;

			clock-names = "iface_clk",

				      "bus_clk",

				      "vsync_clk";

			clock-names = "iface",

				      "bus",

				      "vsync";



			interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
@@ -883,10 +883,10 @@ 
					 <&gcc GCC_MDSS_AXI_CLK>,

					 <&gcc GCC_MDSS_MDP_CLK>,

					 <&gcc GCC_MDSS_VSYNC_CLK>;

				clock-names = "iface_clk",

					      "bus_clk",

					      "core_clk",

					      "vsync_clk";

				clock-names = "iface",

					      "bus",

					      "core",

					      "vsync";



				iommus = <&apps_iommu 4>;
@@ -922,12 +922,12 @@ 
					 <&gcc GCC_MDSS_BYTE0_CLK>,

					 <&gcc GCC_MDSS_PCLK0_CLK>,

					 <&gcc GCC_MDSS_ESC0_CLK>;

				clock-names = "mdp_core_clk",

					      "iface_clk",

					      "bus_clk",

					      "byte_clk",

					      "pixel_clk",

					      "core_clk";

				clock-names = "mdp_core",

					      "iface",

					      "bus",

					      "byte",

					      "pixel",

					      "core";

				phys = <&dsi_phy0>;

				phy-names = "dsi-phy";
@@ -963,7 +963,7 @@ 
				#phy-cells = <0>;



				clocks = <&gcc GCC_MDSS_AHB_CLK>;

				clock-names = "iface_clk";

				clock-names = "iface";

			};

		};

arch/arm64/boot/dts/qcom/pm8005.dtsi

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+33 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/* Copyright 2018 Google LLC. */



#include <dt-bindings/spmi/spmi.h>

#include <dt-bindings/interrupt-controller/irq.h>



&spmi_bus {

	pm8005_lsid0: pmic@4 {

		compatible = "qcom,pm8005", "qcom,spmi-pmic";

		reg = <0x4 SPMI_USID>;

		#address-cells = <1>;

		#size-cells = <0>;



		pm8005_gpio: gpios@c000 {

			compatible = "qcom,pm8005-gpio", "qcom,spmi-gpio";

			reg = <0xc000>;

			gpio-controller;

			#gpio-cells = <2>;

			interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,

				     <0 0xc1 0 IRQ_TYPE_NONE>,

				     <0 0xc2 0 IRQ_TYPE_NONE>,

				     <0 0xc3 0 IRQ_TYPE_NONE>;

		};



	};



	pm8005_lsid1: pmic@5 {

		compatible = "qcom,pm8005", "qcom,spmi-pmic";

		reg = <0x5 SPMI_USID>;

		#address-cells = <1>;

		#size-cells = <0>;

	};

};

arch/arm64/boot/dts/qcom/pm8998.dtsi

0 → 100644
+55 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/* Copyright 2018 Google LLC. */



#include <dt-bindings/spmi/spmi.h>

#include <dt-bindings/interrupt-controller/irq.h>



&spmi_bus {

	pm8998_lsid0: pmic@0 {

		compatible = "qcom,pm8998", "qcom,spmi-pmic";

		reg = <0x0 SPMI_USID>;

		#address-cells = <1>;

		#size-cells = <0>;



		pm8998_gpio: gpios@c000 {

			compatible = "qcom,pm8998-gpio", "qcom,spmi-gpio";

			reg = <0xc000>;

			gpio-controller;

			#gpio-cells = <2>;

			interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,

				     <0 0xc1 0 IRQ_TYPE_NONE>,

				     <0 0xc2 0 IRQ_TYPE_NONE>,

				     <0 0xc3 0 IRQ_TYPE_NONE>,

				     <0 0xc4 0 IRQ_TYPE_NONE>,

				     <0 0xc5 0 IRQ_TYPE_NONE>,

				     <0 0xc6 0 IRQ_TYPE_NONE>,

				     <0 0xc7 0 IRQ_TYPE_NONE>,

				     <0 0xc8 0 IRQ_TYPE_NONE>,

				     <0 0xc9 0 IRQ_TYPE_NONE>,

				     <0 0xca 0 IRQ_TYPE_NONE>,

				     <0 0xcb 0 IRQ_TYPE_NONE>,

				     <0 0xcc 0 IRQ_TYPE_NONE>,

				     <0 0xcd 0 IRQ_TYPE_NONE>,

				     <0 0xce 0 IRQ_TYPE_NONE>,

				     <0 0xcf 0 IRQ_TYPE_NONE>,

				     <0 0xd0 0 IRQ_TYPE_NONE>,

				     <0 0xd1 0 IRQ_TYPE_NONE>,

				     <0 0xd2 0 IRQ_TYPE_NONE>,

				     <0 0xd3 0 IRQ_TYPE_NONE>,

				     <0 0xd4 0 IRQ_TYPE_NONE>,

				     <0 0xd5 0 IRQ_TYPE_NONE>,

				     <0 0xd6 0 IRQ_TYPE_NONE>,

				     <0 0xd7 0 IRQ_TYPE_NONE>,

				     <0 0xd8 0 IRQ_TYPE_NONE>,

				     <0 0xd9 0 IRQ_TYPE_NONE>;

		};



	};



	pm8998_lsid1: pmic@1 {

		compatible = "qcom,pm8998", "qcom,spmi-pmic";

		reg = <0x1 SPMI_USID>;

		#address-cells = <1>;

		#size-cells = <0>;

	};

};

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