Commit 9bc6ac91 authored by Huazhong Tan's avatar Huazhong Tan Committed by David S. Miller
Browse files

net: hns3: handle empty unknown interrupt 



Since some MSI-X interrupt's status may be cleared by hardware,
so when the driver receives the interrupt, reading
HCLGE_VECTOR0_PF_OTHER_INT_STS_REG register will get an empty
unknown interrupt. For this case, the irq handler should enable
vector0 interrupt. This patch also use dev_info() instead of
dev_dbg() in the hclge_check_event_cause(), since this information
will be useful for normal usage.

Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: default avatarPeng Li <lipeng321@huawei.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent bbe6540e

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c

+10 −5
Original line number Diff line number Diff line
@@ -2783,8 +2783,9 @@ static u32 hclge_check_event_cause(struct hclge_dev *hdev, u32 *clearval) 


	/* check for vector0 msix event source */

	if (msix_src_reg & HCLGE_VECTOR0_REG_MSIX_MASK) {

		dev_dbg(&hdev->pdev->dev, "received event 0x%x\n",

		dev_info(&hdev->pdev->dev, "received event 0x%x\n",

			 msix_src_reg);

		*clearval = msix_src_reg;

		return HCLGE_VECTOR0_EVENT_ERR;

	}
@@ -2796,8 +2797,11 @@ static u32 hclge_check_event_cause(struct hclge_dev *hdev, u32 *clearval) 
	}



	/* print other vector0 event source */

	dev_dbg(&hdev->pdev->dev, "cmdq_src_reg:0x%x, msix_src_reg:0x%x\n",

	dev_info(&hdev->pdev->dev,

		 "CMDQ INT status:0x%x, other INT status:0x%x\n",

		 cmdq_src_reg, msix_src_reg);

	*clearval = msix_src_reg;



	return HCLGE_VECTOR0_EVENT_OTHER;

}
@@ -2876,7 +2880,8 @@ static irqreturn_t hclge_misc_irq_handle(int irq, void *data) 
	}



	/* clear the source of interrupt if it is not cause by reset */

	if (event_cause == HCLGE_VECTOR0_EVENT_MBX) {

	if (!clearval ||

	    event_cause == HCLGE_VECTOR0_EVENT_MBX) {

		hclge_clear_event_cause(hdev, event_cause, clearval);

		hclge_enable_vector(&hdev->misc_vector, true);

	}

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