x86/platform/uv: Remove support for uv1 platform from uv_hub (9b9ee172) · Commits · 戴 / test

arch/x86/include/asm/uv/uv_hub.h

+3 −31

Original line number	Diff line number	Diff line
		@@ -224,17 +224,11 @@ static inline struct uv_hub_info_s *uv_cpu_hub_info(int cpu)
		* This is a software convention - NOT the hardware revision numbers in
		* the hub chip.
		*/
		#define UV1_HUB_REVISION_BASE 1
		#define UV2_HUB_REVISION_BASE 3
		#define UV3_HUB_REVISION_BASE 5
		#define UV4_HUB_REVISION_BASE 7
		#define UV4A_HUB_REVISION_BASE 8 /* UV4 (fixed) rev 2 */

		static inline int is_uv1_hub(void)
		{
		return is_uv_hubbed(uv(1));
		}

		static inline int is_uv2_hub(void)
		{
		return is_uv_hubbed(uv(2));
		@@ -265,7 +259,7 @@ static inline int is_uvx_hub(void)

		static inline int is_uv_hub(void)
		{
		return is_uv1_hub() \|\| is_uvx_hub();
		return is_uvx_hub();
		}

		union uvh_apicid {
		@@ -292,11 +286,6 @@ union uvh_apicid {
		#define UV_PNODE_TO_GNODE(p) ((p) \|uv_hub_info->gnode_extra)
		#define UV_PNODE_TO_NASID(p) (UV_PNODE_TO_GNODE(p) << 1)

		#define UV1_LOCAL_MMR_BASE 0xf4000000UL
		#define UV1_GLOBAL_MMR32_BASE 0xf8000000UL
		#define UV1_LOCAL_MMR_SIZE (64UL * 1024 * 1024)
		#define UV1_GLOBAL_MMR32_SIZE (64UL * 1024 * 1024)

		#define UV2_LOCAL_MMR_BASE 0xfa000000UL
		#define UV2_GLOBAL_MMR32_BASE 0xfc000000UL
		#define UV2_LOCAL_MMR_SIZE (32UL * 1024 * 1024)
		@@ -313,25 +302,21 @@ union uvh_apicid {
		#define UV4_GLOBAL_MMR32_SIZE (16UL * 1024 * 1024)

		#define UV_LOCAL_MMR_BASE ( \
		is_uv1_hub() ? UV1_LOCAL_MMR_BASE : \
		is_uv2_hub() ? UV2_LOCAL_MMR_BASE : \
		is_uv3_hub() ? UV3_LOCAL_MMR_BASE : \
		/is_uv4_hub/ UV4_LOCAL_MMR_BASE)

		#define UV_GLOBAL_MMR32_BASE ( \
		is_uv1_hub() ? UV1_GLOBAL_MMR32_BASE : \
		is_uv2_hub() ? UV2_GLOBAL_MMR32_BASE : \
		is_uv3_hub() ? UV3_GLOBAL_MMR32_BASE : \
		/is_uv4_hub/ UV4_GLOBAL_MMR32_BASE)

		#define UV_LOCAL_MMR_SIZE ( \
		is_uv1_hub() ? UV1_LOCAL_MMR_SIZE : \
		is_uv2_hub() ? UV2_LOCAL_MMR_SIZE : \
		is_uv3_hub() ? UV3_LOCAL_MMR_SIZE : \
		/is_uv4_hub/ UV4_LOCAL_MMR_SIZE)

		#define UV_GLOBAL_MMR32_SIZE ( \
		is_uv1_hub() ? UV1_GLOBAL_MMR32_SIZE : \
		is_uv2_hub() ? UV2_GLOBAL_MMR32_SIZE : \
		is_uv3_hub() ? UV3_GLOBAL_MMR32_SIZE : \
		/is_uv4_hub/ UV4_GLOBAL_MMR32_SIZE)
		@@ -352,8 +337,6 @@ union uvh_apicid {
		#define UVH_APICID 0x002D0E00L
		#define UV_APIC_PNODE_SHIFT 6

		#define UV_APICID_HIBIT_MASK 0xffff0000

		/* Local Bus from cpu's perspective */
		#define LOCAL_BUS_BASE 0x1c00000
		#define LOCAL_BUS_SIZE (4 * 1024 * 1024)
		@@ -560,15 +543,6 @@ static inline int uv_apicid_to_pnode(int apicid)
		return s2pn ? s2pn[pnode - uv_hub_info->min_socket] : pnode;
		}

		/* Convert an apicid to the socket number on the blade */
		static inline int uv_apicid_to_socket(int apicid)
		{
		if (is_uv1_hub())
		return (apicid >> (uv_hub_info->apic_pnode_shift - 1)) & 1;
		else
		return 0;
		}

		/*
		* Access global MMRs using the low memory MMR32 space. This region supports
		* faster MMR access but not all MMRs are accessible in this space.
		@@ -660,7 +634,7 @@ static inline int uv_cpu_blade_processor_id(int cpu)
		return uv_cpu_info_per(cpu)->blade_cpu_id;
		}

		/* Blade number to Node number (UV1..UV4 is 1:1) */
		/* Blade number to Node number (UV2..UV4 is 1:1) */
		static inline int uv_blade_to_node(int blade)
		{
		return blade;
		@@ -674,7 +648,7 @@ static inline int uv_numa_blade_id(void)

		/*
		* Convert linux node number to the UV blade number.
		* .. Currently for UV1 thru UV4 the node and the blade are identical.
		* .. Currently for UV2 thru UV4 the node and the blade are identical.
		* .. If this changes then you MUST check references to this function!
		*/
		static inline int uv_node_to_blade_id(int nid)
		@@ -821,8 +795,6 @@ static inline void uv_set_cpu_scir_bits(int cpu, unsigned char value)
		}
		}

		extern unsigned int uv_apicid_hibits;

		/*
		* Get the minimum revision number of the hub chips within the partition.
		* (See UVx_HUB_REVISION_BASE above for specific values.)

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