Blackfin: convert SMP to only use generic time framework (9b9bfded) · Commits · 戴 / test

arch/blackfin/Kconfig

+1 −0

Original line number	Original line	Diff line number	Diff line
	@@ -223,6 +223,7 @@ endchoice

	config SMP		config SMP
	depends on BF561		depends on BF561
			select GENERIC_TIME
	bool "Symmetric multi-processing support"		bool "Symmetric multi-processing support"
	---help---		---help---
	This enables support for systems with more than one CPU,		This enables support for systems with more than one CPU,

arch/blackfin/kernel/time.c

+19 −34

Original line number	Original line	Diff line number	Diff line
	@@ -24,14 +24,10 @@

	static struct irqaction bfin_timer_irq = {		static struct irqaction bfin_timer_irq = {
	.name = "Blackfin Timer Tick",		.name = "Blackfin Timer Tick",
	#ifdef CONFIG_IRQ_PER_CPU
	.flags = IRQF_DISABLED \| IRQF_PERCPU,
	#else
	.flags = IRQF_DISABLED		.flags = IRQF_DISABLED
	#endif
	};		};

	#if defined(CONFIG_TICKSOURCE_GPTMR0) \|\| defined(CONFIG_IPIPE)		#if defined(CONFIG_IPIPE)
	void __init setup_system_timer0(void)		void __init setup_system_timer0(void)
	{		{
	/* Power down the core timer, just to play safe. */		/* Power down the core timer, just to play safe. */
	@@ -74,7 +70,7 @@ void __init setup_core_timer(void)
	static void __init		static void __init
	time_sched_init(irqreturn_t(timer_routine) (int, void ))		time_sched_init(irqreturn_t(timer_routine) (int, void ))
	{		{
	#if defined(CONFIG_TICKSOURCE_GPTMR0) \|\| defined(CONFIG_IPIPE)		#if defined(CONFIG_IPIPE)
	setup_system_timer0();		setup_system_timer0();
	bfin_timer_irq.handler = timer_routine;		bfin_timer_irq.handler = timer_routine;
	setup_irq(IRQ_TIMER0, &bfin_timer_irq);		setup_irq(IRQ_TIMER0, &bfin_timer_irq);
	@@ -94,7 +90,7 @@ static unsigned long gettimeoffset(void)
	unsigned long offset;		unsigned long offset;
	unsigned long clocks_per_jiffy;		unsigned long clocks_per_jiffy;

	#if defined(CONFIG_TICKSOURCE_GPTMR0) \|\| defined(CONFIG_IPIPE)		#if defined(CONFIG_IPIPE)
	clocks_per_jiffy = bfin_read_TIMER0_PERIOD();		clocks_per_jiffy = bfin_read_TIMER0_PERIOD();
	offset = bfin_read_TIMER0_COUNTER() / \		offset = bfin_read_TIMER0_COUNTER() / \
	(((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC);		(((clocks_per_jiffy + 1) * HZ) / USEC_PER_SEC);
	@@ -133,13 +129,6 @@ irqreturn_t timer_interrupt(int irq, void *dummy)
	static long last_rtc_update;		static long last_rtc_update;

	write_seqlock(&xtime_lock);		write_seqlock(&xtime_lock);
	#if defined(CONFIG_TICKSOURCE_GPTMR0) && !defined(CONFIG_IPIPE)
	/*
	* TIMIL0 is latched in __ipipe_grab_irq() when the I-Pipe is
	* enabled.
	*/
	if (get_gptimer_status(0) & TIMER_STATUS_TIMIL0) {
	#endif
	do_timer(1);		do_timer(1);

	/*		/*
	@@ -159,10 +148,6 @@ irqreturn_t timer_interrupt(int irq, void *dummy)
	/* Do it again in 60s. */		/* Do it again in 60s. */
	last_rtc_update = xtime.tv_sec - 600;		last_rtc_update = xtime.tv_sec - 600;
	}		}
	#if defined(CONFIG_TICKSOURCE_GPTMR0) && !defined(CONFIG_IPIPE)
	set_gptimer_status(0, TIMER_STATUS_TIMIL0);
	}
	#endif
	write_sequnlock(&xtime_lock);		write_sequnlock(&xtime_lock);

	#ifdef CONFIG_IPIPE		#ifdef CONFIG_IPIPE

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