Commit 9b974bde authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Issue engine resets onto idle engines 



Always perform the requested reset, even if we believe the engine is
idle. Presumably there was a reason the caller wanted the reset, and in
the near future we lose the easy tracking for whether the engine is
idle.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarJohn Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190125132230.22221-5-chris@chris-wilson.co.uk
parent f3dccbdb

drivers/gpu/drm/i915/i915_reset.c

+0 −4
Original line number Diff line number Diff line
@@ -1076,10 +1076,6 @@ int i915_reset_engine(struct intel_engine_cs *engine, const char *msg) 
	GEM_TRACE("%s flags=%lx\n", engine->name, error->flags);

	GEM_BUG_ON(!test_bit(I915_RESET_ENGINE + engine->id, &error->flags));



	if (i915_seqno_passed(intel_engine_get_seqno(engine),

			      intel_engine_last_submit(engine)))

		return 0;



	reset_prepare_engine(engine);



	if (msg)

drivers/gpu/drm/i915/selftests/intel_hangcheck.c

+6 −16
Original line number Diff line number Diff line
@@ -449,8 +449,6 @@ static int __igt_reset_engine(struct drm_i915_private *i915, bool active) 


		set_bit(I915_RESET_ENGINE + id, &i915->gpu_error.flags);

		do {

			u32 seqno = intel_engine_get_seqno(engine);



			if (active) {

				struct i915_request *rq;
@@ -479,8 +477,6 @@ static int __igt_reset_engine(struct drm_i915_private *i915, bool active) 
					break;

				}



				GEM_BUG_ON(!rq->global_seqno);

				seqno = rq->global_seqno - 1;

				i915_request_put(rq);

			}
@@ -496,11 +492,10 @@ static int __igt_reset_engine(struct drm_i915_private *i915, bool active) 
				break;

			}



			reset_engine_count += active;

			if (i915_reset_engine_count(&i915->gpu_error, engine) !=

			    reset_engine_count) {

				pr_err("%s engine reset %srecorded!\n",

				       engine->name, active ? "not " : "");

			    ++reset_engine_count) {

				pr_err("%s engine reset not recorded!\n",

				       engine->name);

				err = -EINVAL;

				break;

			}
@@ -728,7 +723,6 @@ static int __igt_reset_engines(struct drm_i915_private *i915, 


		set_bit(I915_RESET_ENGINE + id, &i915->gpu_error.flags);

		do {

			u32 seqno = intel_engine_get_seqno(engine);

			struct i915_request *rq = NULL;



			if (flags & TEST_ACTIVE) {
@@ -756,9 +750,6 @@ static int __igt_reset_engines(struct drm_i915_private *i915, 
					err = -EIO;

					break;

				}



				GEM_BUG_ON(!rq->global_seqno);

				seqno = rq->global_seqno - 1;

			}



			err = i915_reset_engine(engine, NULL);
@@ -795,10 +786,9 @@ static int __igt_reset_engines(struct drm_i915_private *i915, 


		reported = i915_reset_engine_count(&i915->gpu_error, engine);

		reported -= threads[engine->id].resets;

		if (reported != (flags & TEST_ACTIVE ? count : 0)) {

			pr_err("i915_reset_engine(%s:%s): reset %lu times, but reported %lu, expected %lu reported\n",

			       engine->name, test_name, count, reported,

			       (flags & TEST_ACTIVE ? count : 0));

		if (reported != count) {

			pr_err("i915_reset_engine(%s:%s): reset %lu times, but reported %lu\n",

			       engine->name, test_name, count, reported);

			if (!err)

				err = -EINVAL;

		}

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