Commit 9b82f05f authored Mar 30, 2020 by Linus Torvalds

Merge branch 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull perf updates from Ingo Molnar:
 "The main changes in this cycle were:

  Kernel side changes:

   - A couple of x86/cpu cleanups and changes were grandfathered in due
     to patch dependencies. These clean up the set of CPU model/family
     matching macros with a consistent namespace and C99 initializer
     style.

   - A bunch of updates to various low level PMU drivers:
       * AMD Family 19h L3 uncore PMU
       * Intel Tiger Lake uncore support
       * misc fixes to LBR TOS sampling

   - optprobe fixes

   - perf/cgroup: optimize cgroup event sched-in processing

   - misc cleanups and fixes

  Tooling side changes are to:

   - perf {annotate,expr,record,report,stat,test}

   - perl scripting

   - libapi, libperf and libtraceevent

   - vendor events on Intel and S390, ARM cs-etm

   - Intel PT updates

   - Documentation changes and updates to core facilities

   - misc cleanups, fixes and other enhancements"

* 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (89 commits)
  cpufreq/intel_pstate: Fix wrong macro conversion
  x86/cpu: Cleanup the now unused CPU match macros
  hwrng: via_rng: Convert to new X86 CPU match macros
  crypto: Convert to new CPU match macros
  ASoC: Intel: Convert to new X86 CPU match macros
  powercap/intel_rapl: Convert to new X86 CPU match macros
  PCI: intel-mid: Convert to new X86 CPU match macros
  mmc: sdhci-acpi: Convert to new X86 CPU match macros
  intel_idle: Convert to new X86 CPU match macros
  extcon: axp288: Convert to new X86 CPU match macros
  thermal: Convert to new X86 CPU match macros
  hwmon: Convert to new X86 CPU match macros
  platform/x86: Convert to new CPU match macros
  EDAC: Convert to new X86 CPU match macros
  cpufreq: Convert to new X86 CPU match macros
  ACPI: Convert to new X86 CPU match macros
  x86/platform: Convert to new CPU match macros
  x86/kernel: Convert to new CPU match macros
  x86/kvm: Convert to new CPU match macros
  x86/perf/events: Convert to new CPU match macros
  ...

parents 4b9fd8a8 629b3df7

arch/powerpc/perf/core-book3s.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -518,6 +518,7 @@ static void power_pmu_bhrb_read(struct perf_event event, struct cpu_hw_events
		}
		}
		cpuhw->bhrb_stack.nr = u_index;
		cpuhw->bhrb_stack.hw_idx = -1ULL;
		return;
		}

arch/x86/Kconfig

+0 −1

Original line number	Diff line number	Diff line
		@@ -1875,7 +1875,6 @@ config X86_SMAP

		config X86_UMIP
		def_bool y
		depends on CPU_SUP_INTEL \|\| CPU_SUP_AMD
		prompt "User Mode Instruction Prevention" if EXPERT
		---help---
		User Mode Instruction Prevention (UMIP) is a security feature in

arch/x86/crypto/aesni-intel_glue.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -1064,7 +1064,7 @@ static struct aead_alg aesni_aeads[0];
		static struct simd_aead_alg *aesni_simd_aeads[ARRAY_SIZE(aesni_aeads)];

		static const struct x86_cpu_id aesni_cpu_id[] = {
		X86_FEATURE_MATCH(X86_FEATURE_AES),
		X86_MATCH_FEATURE(X86_FEATURE_AES, NULL),
		{}
		};
		MODULE_DEVICE_TABLE(x86cpu, aesni_cpu_id);

arch/x86/crypto/crc32-pclmul_glue.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -170,7 +170,7 @@ static struct shash_alg alg = {
		};

		static const struct x86_cpu_id crc32pclmul_cpu_id[] = {
		X86_FEATURE_MATCH(X86_FEATURE_PCLMULQDQ),
		X86_MATCH_FEATURE(X86_FEATURE_PCLMULQDQ, NULL),
		{}
		};
		MODULE_DEVICE_TABLE(x86cpu, crc32pclmul_cpu_id);

arch/x86/crypto/crc32c-intel_glue.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -221,7 +221,7 @@ static struct shash_alg alg = {
		};

		static const struct x86_cpu_id crc32c_cpu_id[] = {
		X86_FEATURE_MATCH(X86_FEATURE_XMM4_2),
		X86_MATCH_FEATURE(X86_FEATURE_XMM4_2, NULL),
		{}
		};
		MODULE_DEVICE_TABLE(x86cpu, crc32c_cpu_id);

Admin message