Commit 9b61c0fc authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge drm-fixes into drm-next.

Nouveau wanted this to avoid some worse conflicts when I merge that.
parents 550e3b23 125234dc
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@@ -7,7 +7,7 @@ This is the authoritative documentation on the design, interface and
conventions of cgroup v2.  It describes all userland-visible aspects
of cgroup including core and specific controller behaviors.  All
future changes must be reflected in this document.  Documentation for
v1 is available under Documentation/cgroup-legacy/.
v1 is available under Documentation/cgroup-v1/.

CONTENTS

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@@ -23,6 +23,7 @@ Optional properties:
  during suspend.
- ti,no-reset-on-init: When present, the module should not be reset at init
- ti,no-idle-on-init: When present, the module should not be idled at init
- ti,no-idle: When present, the module is never allowed to idle.

Example:

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@@ -30,7 +30,7 @@ that they are defined using standard clock bindings with following
clock-output-names:
 - "xin24m" - crystal input - required,
 - "ext_i2s" - external I2S clock - optional,
 - "ext_gmac" - external GMAC clock - optional
 - "rmii_clkin" - external EMAC clock - optional

Example: Clock controller node:

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@@ -24,9 +24,8 @@ Main node required properties:
		1 = edge triggered
		4 = level triggered

  Cells 4 and beyond are reserved for future use. When the 1st cell
  has a value of 0 or 1, cells 4 and beyond act as padding, and may be
  ignored. It is recommended that padding cells have a value of 0.
  Cells 4 and beyond are reserved for future use and must have a value
  of 0 if present.

- reg : Specifies base physical address(s) and size of the GIC
  registers, in the following order:
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@@ -82,8 +82,8 @@ Example:
				  "ch16", "ch17", "ch18", "ch19",
				  "ch20", "ch21", "ch22", "ch23",
				  "ch24";
		clocks = <&mstp8_clks R8A7795_CLK_ETHERAVB>;
		power-domains = <&cpg_clocks>;
		clocks = <&cpg CPG_MOD 812>;
		power-domains = <&cpg>;
		phy-mode = "rgmii-id";
		phy-handle = <&phy0>;

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