drm/vmwgfx: remove CONFIG_INTEL_IOMMU ifdefs v2 (9b5bf242) · Commits · 戴 / test

drivers/gpu/drm/vmwgfx/vmwgfx_drv.c

+4 −17

Original line number	Diff line number	Diff line
		@@ -567,12 +567,10 @@ static int vmw_dma_select_mode(struct vmw_private *dev_priv)
		[vmw_dma_map_bind] = "Giving up DMA mappings early."};
		const struct dma_map_ops *dma_ops = get_dma_ops(dev_priv->dev->dev);

		#ifdef CONFIG_INTEL_IOMMU
		if (intel_iommu_enabled) {
		dev_priv->map_mode = vmw_dma_map_populate;
		goto out_fixup;
		}
		#endif

		if (!(vmw_force_iommu \|\| vmw_force_coherent)) {
		dev_priv->map_mode = vmw_dma_phys;
		@@ -589,9 +587,7 @@ static int vmw_dma_select_mode(struct vmw_private *dev_priv)
		dev_priv->map_mode = vmw_dma_map_populate;
		#endif

		#ifdef CONFIG_INTEL_IOMMU
		out_fixup:
		#endif
		if (dev_priv->map_mode == vmw_dma_map_populate &&
		vmw_restrict_iommu)
		dev_priv->map_mode = vmw_dma_map_bind;
		@@ -599,13 +595,11 @@ out_fixup:
		if (vmw_force_coherent)
		dev_priv->map_mode = vmw_dma_alloc_coherent;

		#if !defined(CONFIG_SWIOTLB) && !defined(CONFIG_INTEL_IOMMU)
		/*
		* No coherent page pool
		*/
		if (dev_priv->map_mode == vmw_dma_alloc_coherent)
		/* No TTM coherent page pool? FIXME: Ask TTM instead! */
		if (!(IS_ENABLED(CONFIG_SWIOTLB) \|\| IS_ENABLED(CONFIG_INTEL_IOMMU)) &&
		(dev_priv->map_mode == vmw_dma_alloc_coherent))
		return -EINVAL;
		#endif

		DRM_INFO("DMA map mode: %s\n", names[dev_priv->map_mode]);

		return 0;
		@@ -619,7 +613,6 @@ out_fixup:
		* With 32-bit we can only handle 32 bit PFNs. Optionally set that
		* restriction also for 64-bit systems.
		*/
		#ifdef CONFIG_INTEL_IOMMU
		static int vmw_dma_masks(struct vmw_private *dev_priv)
		{
		struct drm_device *dev = dev_priv->dev;
		@@ -631,12 +624,6 @@ static int vmw_dma_masks(struct vmw_private *dev_priv)
		}
		return 0;
		}
		#else
		static int vmw_dma_masks(struct vmw_private *dev_priv)
		{
		return 0;
		}
		#endif

		static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
		{

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