Commit 9b5a3c0a authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-fixes-3.14' of git://people.freedesktop.org/~agd5f/linux into drm-next 

Misc fixes for radeon, the irqs ones being most important.

* 'drm-fixes-3.14' of git://people.freedesktop.org/~agd5f/linux:
  drm/radeon: add missing include in btc_dpm.c
  drm/radeon/dpm: fix uninitialized read from stack in kv_dpm_late_enable
  drm/radeon: remove useless return
  drm/radeon/dpm: use stored max_vddc rather than looking it up
  drm/radeon/dpm: use the driver state for dpm debugfs
  drm/radeon: fix UVD IRQ support on 7xx
  drm/radeon: fix UVD IRQ support on SI
parents 7c4c62a0 d02f8575

drivers/gpu/drm/radeon/btc_dpm.c

+32 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ 
#include "cypress_dpm.h"

#include "btc_dpm.h"

#include "atom.h"

#include <linux/seq_file.h>



#define MC_CG_ARB_FREQ_F0           0x0a

#define MC_CG_ARB_FREQ_F1           0x0b
@@ -2756,6 +2757,37 @@ void btc_dpm_fini(struct radeon_device *rdev) 
	r600_free_extended_power_table(rdev);

}



void btc_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,

						     struct seq_file *m)

{

	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);

	struct radeon_ps *rps = &eg_pi->current_rps;

	struct rv7xx_ps *ps = rv770_get_ps(rps);

	struct rv7xx_pl *pl;

	u32 current_index =

		(RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & CURRENT_PROFILE_INDEX_MASK) >>

		CURRENT_PROFILE_INDEX_SHIFT;



	if (current_index > 2) {

		seq_printf(m, "invalid dpm profile %d\n", current_index);

	} else {

		if (current_index == 0)

			pl = &ps->low;

		else if (current_index == 1)

			pl = &ps->medium;

		else /* current_index == 2 */

			pl = &ps->high;

		seq_printf(m, "uvd    vclk: %d dclk: %d\n", rps->vclk, rps->dclk);

		if (rdev->family >= CHIP_CEDAR) {

			seq_printf(m, "power level %d    sclk: %u mclk: %u vddc: %u vddci: %u\n",

				   current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci);

		} else {

			seq_printf(m, "power level %d    sclk: %u mclk: %u vddc: %u\n",

				   current_index, pl->sclk, pl->mclk, pl->vddc);

		}

	}

}



u32 btc_dpm_get_sclk(struct radeon_device *rdev, bool low)

{

	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);

drivers/gpu/drm/radeon/btcd.h

+4 −0
Original line number Diff line number Diff line
@@ -44,6 +44,10 @@ 
#       define DYN_SPREAD_SPECTRUM_EN                   (1 << 23)

#       define AC_DC_SW                                 (1 << 24)



#define TARGET_AND_CURRENT_PROFILE_INDEX                  0x66c

#       define CURRENT_PROFILE_INDEX_MASK                 (0xf << 4)

#       define CURRENT_PROFILE_INDEX_SHIFT                4



#define	CG_BIF_REQ_AND_RSP				0x7f4

#define		CG_CLIENT_REQ(x)			((x) << 0)

#define		CG_CLIENT_REQ_MASK			(0xff << 0)

drivers/gpu/drm/radeon/kv_dpm.c

+1 −1
Original line number Diff line number Diff line
@@ -1223,7 +1223,7 @@ int kv_dpm_enable(struct radeon_device *rdev) 


int kv_dpm_late_enable(struct radeon_device *rdev)

{

	int ret;

	int ret = 0;



	if (rdev->irq.installed &&

	    r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) {

drivers/gpu/drm/radeon/ni_dpm.c

+4 −4
Original line number Diff line number Diff line
@@ -3945,7 +3945,6 @@ static void ni_parse_pplib_clock_info(struct radeon_device *rdev, 
	struct rv7xx_power_info *pi = rv770_get_pi(rdev);

	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);

	struct ni_ps *ps = ni_get_ps(rps);

	u16 vddc;

	struct rv7xx_pl *pl = &ps->performance_levels[index];



	ps->performance_level_count = index + 1;
@@ -3961,8 +3960,8 @@ static void ni_parse_pplib_clock_info(struct radeon_device *rdev, 


	/* patch up vddc if necessary */

	if (pl->vddc == 0xff01) {

		if (radeon_atom_get_max_vddc(rdev, 0, 0, &vddc) == 0)

			pl->vddc = vddc;

		if (pi->max_vddc)

			pl->vddc = pi->max_vddc;

	}



	if (rps->class & ATOM_PPLIB_CLASSIFICATION_ACPI) {
@@ -4322,7 +4321,8 @@ void ni_dpm_print_power_state(struct radeon_device *rdev, 
void ni_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,

						    struct seq_file *m)

{

	struct radeon_ps *rps = rdev->pm.dpm.current_ps;

	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);

	struct radeon_ps *rps = &eg_pi->current_rps;

	struct ni_ps *ps = ni_get_ps(rps);

	struct rv7xx_pl *pl;

	u32 current_index =

drivers/gpu/drm/radeon/r600.c

+4 −0
Original line number Diff line number Diff line
@@ -3991,6 +3991,10 @@ restart_ih: 
				break;

			}

			break;

		case 124: /* UVD */

			DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data);

			radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX);

			break;

		case 176: /* CP_INT in ring buffer */

		case 177: /* CP_INT in IB1 */

		case 178: /* CP_INT in IB2 */

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