Commit 9b1e57ef authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
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Merge tag 'iio-for-5.10c' of...

Merge tag 'iio-for-5.10c' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next

Jonathan writes:

3rd set of new device support features and cleanup for IIO in the 5.10 cycle.

A late set given it seems the 5.10 cycle is going to start a bit later
than expected and quite a bit came in.  Includes some late breaking
fixes that can wait for the merge window.

New device support
* ad9467
  - ad9434 support including dt bindings update
  - ad9265 support including dt bindings update

Yaml conversion
* amlogic,meson-saradc

Core rework (heading towards multiple buffer support)
* refactor iio_device_register_eventset
* Null-ify IIO device's event_interface during unregister.

Features
* ad7291
  - convert from platform_data to devicetree including bindings doc.
* core
  - Add titles to a few IIO config symbols to allow simpler out of tree
    building.  It does little harm so why not enable it.

Fixes
* ad7292
  - Fix missing of_node_put()
* at91-sama5d2
  - Fix a crash due to missordering of dma enabling as a result of recent
    IIO wide rework.
* gyro-adc
  - Fix missing of_node_put()
* ltc2983
  - Fix missing of_node_put()
* stm32-adc
  - Fix an issue with runtime autosuspend related to parent autosuspending.

Cleanups
* counter/ti-eqep
  - Tidy up a , instead of ;
* buffer-dmaengine
  - Drop the unmanaged allocator functions as no one is using them.
* at91-sama5d2
  - devm_platform_get_and_ioremap_resouce() replacing boilerplate.
* cros_ec
  - move the hw fifo attributes setup into the cros_ec core.
* gp2ap002
  - comment typo
* microchip-tcb-capture:
  - consitifcation
* ssp
  - Use PLATFORM_DEVID_NONE instead of -1 to convey true meaning.
* stm32-dfsdm
  - devm_platform_get_and_ioremap_resouce() replacing boilerplate.

* tag 'iio-for-5.10c' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (25 commits)
  iio: adc: gyroadc: fix leak of device node iterator
  iio: adc: stm32-adc: fix runtime autosuspend delay when slow polling
  iio: adc: at91-sama5d2_adc: fix DMA conversion crash
  iio: ad7292: Fix of_node refcounting
  iio: ltc2983: Fix of_node refcounting
  counter: use semicolons rather than commas to separate statements
  iio: buffer: Kconfig: add title for IIO_TRIGGERED_BUFFER symbol
  iio: Kconfig: Provide title for IIO_TRIGGERED_EVENT symbol
  iio: dma-buffer: Kconfig: Provide titles for IIO DMA Kconfig symbols
  iio: cros_ec: unify hw fifo attributes into the core file
  dt-bindings: iio: ad9467: add entries for for AD9434 & AD9265 ADCs
  iio: adc: ad9467: add support for AD9265 high-speed ADC
  iio: adc: ad9467: add support for AD9434 high-speed ADC
  iio: adc: ad9467: wrap a axi-adc chip-info into a ad9467_chip_info type
  iio: buffer-dmaengine: remove non managed alloc/free
  iio: adc: stm32-dfsdm: Use devm_platform_get_and_ioremap_resource()
  iio: adc: at91-sama5d2_adc: Use devm_platform_get_and_ioremap_resource()
  iio: ssp: use PLATFORM_DEVID_NONE
  dt-bindings: iio: adc: ad7291: add binding
  iio: adc: ad7291: convert to device tree
  ...
parents eca1d82e da4410d4
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+46 −0
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/adi,ad7291.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: AD7291 8-Channel, I2C, 12-Bit SAR ADC with Temperature Sensor

maintainers:
  - Michael Auchter <michael.auchter@ni.com>

description: |
  Analog Devices AD7291 8-Channel I2C 12-Bit SAR ADC with Temperature Sensor
  https://www.analog.com/media/en/technical-documentation/data-sheets/ad7291.pdf

properties:
  compatible:
    enum:
      - adi,ad7291

  reg:
    maxItems: 1

  vref-supply:
    description: |
      The regulator supply for ADC reference voltage.

required:
  - compatible
  - reg

additionalProperties: false

examples:
  - |
    i2c {
      #address-cells = <1>;
      #size-cells = <0>;

      ad7291: adc@0 {
        compatible = "adi,ad7291";
        reg = <0>;
        vref-supply = <&adc_vref>;
      };
    };
...
 No newline at end of file
+12 −3
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@@ -4,21 +4,30 @@
$id: http://devicetree.org/schemas/iio/adc/adi,ad9467.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Analog Devices AD9467 High-Speed ADC
title: Analog Devices AD9467 and similar High-Speed ADCs

maintainers:
  - Michael Hennerich <michael.hennerich@analog.com>
  - Alexandru Ardelean <alexandru.ardelean@analog.com>

description: |
  The AD9467 is a 16-bit, monolithic, IF sampling analog-to-digital
  converter (ADC).
  The AD9467 and the parts similar with it, are high-speed analog-to-digital
  converters (ADCs), operating in the range of 100 to 500 mega samples
  per second (MSPS). Some parts support higher MSPS and some
  lower MSPS, suitable for the intended application of each part.

  All the parts support the register map described by Application Note AN-877
   https://www.analog.com/media/en/technical-documentation/application-notes/AN-877.pdf

  https://www.analog.com/media/en/technical-documentation/data-sheets/AD9265.pdf
  https://www.analog.com/media/en/technical-documentation/data-sheets/AD9434.pdf
  https://www.analog.com/media/en/technical-documentation/data-sheets/AD9467.pdf

properties:
  compatible:
    enum:
      - adi,ad9265
      - adi,ad9434
      - adi,ad9467

  reg:
+0 −48
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* Amlogic Meson SAR (Successive Approximation Register) A/D converter

Required properties:
- compatible:	depending on the SoC this should be one of:
			- "amlogic,meson8-saradc" for Meson8
			- "amlogic,meson8b-saradc" for Meson8b
			- "amlogic,meson8m2-saradc" for Meson8m2
			- "amlogic,meson-gxbb-saradc" for GXBB
			- "amlogic,meson-gxl-saradc" for GXL
			- "amlogic,meson-gxm-saradc" for GXM
			- "amlogic,meson-axg-saradc" for AXG
			- "amlogic,meson-g12a-saradc" for AXG
		along with the generic "amlogic,meson-saradc"
- reg:		the physical base address and length of the registers
- interrupts:	the interrupt indicating end of sampling
- clocks:	phandle and clock identifier (see clock-names)
- clock-names:	mandatory clocks:
			- "clkin" for the reference clock (typically XTAL)
			- "core" for the SAR ADC core clock
		optional clocks:
			- "adc_clk" for the ADC (sampling) clock
			- "adc_sel" for the ADC (sampling) clock mux
- vref-supply:	the regulator supply for the ADC reference voltage
- #io-channel-cells: must be 1, see ../iio-bindings.txt

Optional properties:
- amlogic,hhi-sysctrl:	phandle to the syscon which contains the 5th bit
			of the TSC (temperature sensor coefficient) on
			Meson8b and Meson8m2 (which used to calibrate the
			temperature sensor)
- nvmem-cells:		phandle to the temperature_calib eFuse cells
- nvmem-cell-names:	if present (to enable the temperature sensor
			calibration) this must contain "temperature_calib"


Example:
	saradc: adc@8680 {
		compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
		#io-channel-cells = <1>;
		reg = <0x0 0x8680 0x0 0x34>;
		interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
		clocks = <&xtal>,
			 <&clkc CLKID_SAR_ADC>,
			 <&clkc CLKID_SANA>,
			 <&clkc CLKID_SAR_ADC_CLK>,
			 <&clkc CLKID_SAR_ADC_SEL>;
		clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel";
	};
+149 −0
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/amlogic,meson-saradc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Amlogic Meson SAR (Successive Approximation Register) A/D converter

maintainers:
  - Martin Blumenstingl <martin.blumenstingl@googlemail.com>

description:
  Binding covers a range of ADCs found on Amlogic Meson SoCs.

properties:
  compatible:
    oneOf:
      - const: amlogic,meson-saradc
      - items:
          - enum:
              - amlogic,meson8-saradc
              - amlogic,meson8b-saradc
              - amlogic,meson8m2-saradc
              - amlogic,meson-gxbb-saradc
              - amlogic,meson-gxl-saradc
              - amlogic,meson-gxm-saradc
              - amlogic,meson-axg-saradc
              - amlogic,meson-g12a-saradc
          - const: amlogic,meson-saradc

  reg:
    maxItems: 1

  interrupts:
    description: Interrupt indicates end of sampling.
    maxItems: 1

  clocks:
    minItems: 2
    maxItems: 4

  clock-names:
    minItems: 2
    maxItems: 4
    items:
      - const: clkin
      - const: core
      - const: adc_clk
      - const: adc_sel

  vref-supply: true

  "#io-channel-cells":
    const: 1

  amlogic,hhi-sysctrl:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Syscon which contains the 5th bit of the TSC (temperature sensor
      coefficient) on Meson8b and Meson8m2 (which used to calibrate the
      temperature sensor)

  nvmem-cells:
    description: phandle to the temperature_calib eFuse cells
    maxItems: 1

  nvmem-cell-names:
    const: temperature_calib

allOf:
  - if:
      properties:
        compatible:
          contains:
            enum:
              - amlogic,meson8-saradc
              - amlogic,meson8b-saradc
              - amlogic,meson8m2-saradc
    then:
      properties:
        clocks:
          maxItems: 2
        clock-names:
          maxItems: 2
    else:
      properties:
        nvmem-cells: false
        mvmem-cel-names: false
        clocks:
          minItems: 4
        clock-names:
          minItems: 4

  - if:
      properties:
        compatible:
          contains:
            enum:
              - amlogic,meson8b-saradc
              - amlogic,meson8m2-saradc
    then:
      properties:
        amlogic,hhi-sysctrl: true
    else:
      properties:
        amlogic,hhi-sysctrl: false

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - "#io-channel-cells"

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    #include <dt-bindings/clock/gxbb-clkc.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    soc {
        #address-cells = <2>;
        #size-cells = <2>;
        adc@8680 {
            compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
            #io-channel-cells = <1>;
            reg = <0x0 0x8680 0x0 0x34>;
            interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
            clocks = <&xtal>,
                <&clkc CLKID_SAR_ADC>,
                <&clkc CLKID_SAR_ADC_CLK>,
                <&clkc CLKID_SAR_ADC_SEL>;
            clock-names = "clkin", "core", "adc_clk", "adc_sel";
        };
        adc@9680 {
            compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc";
            #io-channel-cells = <1>;
            reg = <0x0 0x9680 0x0 0x34>;
            interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
            clocks = <&xtal>, <&clkc CLKID_SAR_ADC>;
            clock-names = "clkin", "core";
            nvmem-cells = <&tsens_caldata>;
            nvmem-cell-names = "temperature_calib";
            amlogic,hhi-sysctrl = <&hhi>;
        };
    };
...
+1 −1
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@@ -253,7 +253,7 @@ static struct counter_count mchp_tc_counts[] = {
	},
};

static struct counter_ops mchp_tc_ops = {
static const struct counter_ops mchp_tc_ops = {
	.signal_read  = mchp_tc_count_signal_read,
	.count_read   = mchp_tc_count_read,
	.function_get = mchp_tc_count_function_get,
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