Commit 9b1136d5 authored by Oscar Mateo's avatar Oscar Mateo Committed by Daniel Vetter
Browse files

drm/i915/bdw: GEN-specific logical ring init 



Logical rings do not need most of the initialization their
legacy ringbuffer counterparts do: we just need the pipe
control object for the render ring, enable Execlists on the
hardware and a few workarounds.

v2: Squash with: "drm/i915: Extract pipe control fini & make
init outside accesible".

Signed-off-by: default avatarOscar Mateo <oscar.mateo@intel.com>
Reviewed-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
[danvet: Make checkpatch happy.]
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 48d82387

drivers/gpu/drm/i915/intel_lrc.c

+54 −0
Original line number Diff line number Diff line
@@ -108,6 +108,49 @@ void intel_logical_ring_stop(struct intel_engine_cs *ring) 
	/* TODO */

}



static int gen8_init_common_ring(struct intel_engine_cs *ring)

{

	struct drm_device *dev = ring->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;



	I915_WRITE(RING_MODE_GEN7(ring),

		   _MASKED_BIT_DISABLE(GFX_REPLAY_MODE) |

		   _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE));

	POSTING_READ(RING_MODE_GEN7(ring));

	DRM_DEBUG_DRIVER("Execlists enabled for %s\n", ring->name);



	memset(&ring->hangcheck, 0, sizeof(ring->hangcheck));



	return 0;

}



static int gen8_init_render_ring(struct intel_engine_cs *ring)

{

	struct drm_device *dev = ring->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	int ret;



	ret = gen8_init_common_ring(ring);

	if (ret)

		return ret;



	/* We need to disable the AsyncFlip performance optimisations in order

	 * to use MI_WAIT_FOR_EVENT within the CS. It should already be

	 * programmed to '1' on all products.

	 *

	 * WaDisableAsyncFlipPerfMode:snb,ivb,hsw,vlv,bdw,chv

	 */

	I915_WRITE(MI_MODE, _MASKED_BIT_ENABLE(ASYNC_FLIP_PERF_DISABLE));



	ret = intel_init_pipe_control(ring);

	if (ret)

		return ret;



	I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));



	return ret;

}



void intel_logical_ring_cleanup(struct intel_engine_cs *ring)

{

	if (!intel_ring_initialized(ring))
@@ -178,6 +221,9 @@ static int logical_render_ring_init(struct drm_device *dev) 
	ring->irq_enable_mask =

		GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT;



	ring->init = gen8_init_render_ring;

	ring->cleanup = intel_fini_pipe_control;



	return logical_ring_init(dev, ring);

}
@@ -192,6 +238,8 @@ static int logical_bsd_ring_init(struct drm_device *dev) 
	ring->irq_enable_mask =

		GT_RENDER_USER_INTERRUPT << GEN8_VCS1_IRQ_SHIFT;



	ring->init = gen8_init_common_ring;



	return logical_ring_init(dev, ring);

}
@@ -206,6 +254,8 @@ static int logical_bsd2_ring_init(struct drm_device *dev) 
	ring->irq_enable_mask =

		GT_RENDER_USER_INTERRUPT << GEN8_VCS2_IRQ_SHIFT;



	ring->init = gen8_init_common_ring;



	return logical_ring_init(dev, ring);

}
@@ -220,6 +270,8 @@ static int logical_blt_ring_init(struct drm_device *dev) 
	ring->irq_enable_mask =

		GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT;



	ring->init = gen8_init_common_ring;



	return logical_ring_init(dev, ring);

}
@@ -234,6 +286,8 @@ static int logical_vebox_ring_init(struct drm_device *dev) 
	ring->irq_enable_mask =

		GT_RENDER_USER_INTERRUPT << GEN8_VECS_IRQ_SHIFT;



	ring->init = gen8_init_common_ring;



	return logical_ring_init(dev, ring);

}

drivers/gpu/drm/i915/intel_ringbuffer.c

+21 −13
Original line number Diff line number Diff line
@@ -597,8 +597,25 @@ out: 
	return ret;

}



static int

init_pipe_control(struct intel_engine_cs *ring)

void

intel_fini_pipe_control(struct intel_engine_cs *ring)

{

	struct drm_device *dev = ring->dev;



	if (ring->scratch.obj == NULL)

		return;



	if (INTEL_INFO(dev)->gen >= 5) {

		kunmap(sg_page(ring->scratch.obj->pages->sgl));

		i915_gem_object_ggtt_unpin(ring->scratch.obj);

	}



	drm_gem_object_unreference(&ring->scratch.obj->base);

	ring->scratch.obj = NULL;

}



int

intel_init_pipe_control(struct intel_engine_cs *ring)

{

	int ret;
@@ -673,7 +690,7 @@ static int init_render_ring(struct intel_engine_cs *ring) 
			   _MASKED_BIT_ENABLE(GFX_REPLAY_MODE));



	if (INTEL_INFO(dev)->gen >= 5) {

		ret = init_pipe_control(ring);

		ret = intel_init_pipe_control(ring);

		if (ret)

			return ret;

	}
@@ -708,16 +725,7 @@ static void render_ring_cleanup(struct intel_engine_cs *ring) 
		dev_priv->semaphore_obj = NULL;

	}



	if (ring->scratch.obj == NULL)

		return;



	if (INTEL_INFO(dev)->gen >= 5) {

		kunmap(sg_page(ring->scratch.obj->pages->sgl));

		i915_gem_object_ggtt_unpin(ring->scratch.obj);

	}



	drm_gem_object_unreference(&ring->scratch.obj->base);

	ring->scratch.obj = NULL;

	intel_fini_pipe_control(ring);

}



static int gen8_rcs_signal(struct intel_engine_cs *signaller,

drivers/gpu/drm/i915/intel_ringbuffer.h

+3 −0
Original line number Diff line number Diff line
@@ -381,6 +381,9 @@ void intel_ring_init_seqno(struct intel_engine_cs *ring, u32 seqno); 
int intel_ring_flush_all_caches(struct intel_engine_cs *ring);

int intel_ring_invalidate_all_caches(struct intel_engine_cs *ring);



void intel_fini_pipe_control(struct intel_engine_cs *ring);

int intel_init_pipe_control(struct intel_engine_cs *ring);



int intel_init_render_ring_buffer(struct drm_device *dev);

int intel_init_bsd_ring_buffer(struct drm_device *dev);

int intel_init_bsd2_ring_buffer(struct drm_device *dev);

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