Commit 9b0955ba authored by Will Deacon's avatar Will Deacon
Browse files

arm64: Rename ARM64_SSBD to ARM64_SPECTRE_V4 



In a similar manner to the renaming of ARM64_HARDEN_BRANCH_PREDICTOR
to ARM64_SPECTRE_V2, rename ARM64_SSBD to ARM64_SPECTRE_V4. This isn't
_entirely_ accurate, as we also need to take into account the interaction
with SSBS, but that will be taken care of in subsequent patches.

Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent 532d5815

arch/arm64/include/asm/cpucaps.h

+1 −1
Original line number Diff line number Diff line
@@ -37,7 +37,7 @@ 
#define ARM64_HAS_CACHE_IDC			27

#define ARM64_HAS_CACHE_DIC			28

#define ARM64_HW_DBM				29

#define ARM64_SSBD				30

#define ARM64_SPECTRE_V4			30

#define ARM64_MISMATCHED_CACHE_TYPE		31

#define ARM64_HAS_STAGE2_FWB			32

#define ARM64_HAS_CRC32				33

arch/arm64/kernel/cpu_errata.c

+1 −1
Original line number Diff line number Diff line
@@ -675,7 +675,7 @@ const struct arm64_cpu_capabilities arm64_errata[] = { 
#endif

	{

		.desc = "Speculative Store Bypass Disable",

		.capability = ARM64_SSBD,

		.capability = ARM64_SPECTRE_V4,

		.type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM,

		.matches = has_ssbd_mitigation,

		.cpu_enable = cpu_enable_ssbd_mitigation,

arch/arm64/kvm/hyp/include/hyp/switch.h

+1 −1
Original line number Diff line number Diff line
@@ -481,7 +481,7 @@ exit: 


static inline bool __needs_ssbd_off(struct kvm_vcpu *vcpu)

{

	if (!cpus_have_final_cap(ARM64_SSBD))

	if (!cpus_have_final_cap(ARM64_SPECTRE_V4))

		return false;



	return !(vcpu->arch.workaround_flags & VCPU_WORKAROUND_2_FLAG);

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